Commit 6d3c900c authored by Arunpravin Paneer Selvam's avatar Arunpravin Paneer Selvam Committed by Christian König
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drm/ttm: Switch to using the new res callback



Apply new intersect and compatible callback instead
of having a generic placement range verfications.

v2: Added a separate callback for compatiblilty
    checks (Christian)
v3: Cleanups and removal of workarounds

Signed-off-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarArunpravin Paneer Selvam <Arunpravin.PaneerSelvam@amd.com>
Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220820073304.178444-6-Arunpravin.PaneerSelvam@amd.com
parent 73b984d8
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+13 −32
Original line number Diff line number Diff line
@@ -1328,11 +1328,12 @@ uint64_t amdgpu_ttm_tt_pte_flags(struct amdgpu_device *adev, struct ttm_tt *ttm,
static bool amdgpu_ttm_bo_eviction_valuable(struct ttm_buffer_object *bo,
					    const struct ttm_place *place)
{
	unsigned long num_pages = bo->resource->num_pages;
	struct dma_resv_iter resv_cursor;
	struct amdgpu_res_cursor cursor;
	struct dma_fence *f;

	if (!amdgpu_bo_is_amdgpu_bo(bo))
		return ttm_bo_eviction_valuable(bo, place);

	/* Swapout? */
	if (bo->resource->mem_type == TTM_PL_SYSTEM)
		return true;
@@ -1351,8 +1352,6 @@ static bool amdgpu_ttm_bo_eviction_valuable(struct ttm_buffer_object *bo,
			return false;
	}

	switch (bo->resource->mem_type) {
	case AMDGPU_PL_PREEMPT:
	/* Preemptible BOs don't own system resources managed by the
	 * driver (pages, VRAM, GART space). They point to resources
	 * owned by someone else (e.g. pageable memory in user mode
@@ -1360,31 +1359,13 @@ static bool amdgpu_ttm_bo_eviction_valuable(struct ttm_buffer_object *bo,
	 * can guarantee no deadlocks and good QoS in case of MMU
	 * notifiers or DMABuf move notifiers from the resource owner.
	 */
	if (bo->resource->mem_type == AMDGPU_PL_PREEMPT)
		return false;
	case TTM_PL_TT:
		if (amdgpu_bo_is_amdgpu_bo(bo) &&
		    amdgpu_bo_encrypted(ttm_to_amdgpu_bo(bo)))
			return false;
		return true;

	case TTM_PL_VRAM:
		/* Check each drm MM node individually */
		amdgpu_res_first(bo->resource, 0, (u64)num_pages << PAGE_SHIFT,
				 &cursor);
		while (cursor.remaining) {
			if (place->fpfn < PFN_DOWN(cursor.start + cursor.size)
			    && !(place->lpfn &&
				 place->lpfn <= PFN_DOWN(cursor.start)))
				return true;

			amdgpu_res_next(&cursor, cursor.size);
		}
	if (bo->resource->mem_type == TTM_PL_TT &&
	    amdgpu_bo_encrypted(ttm_to_amdgpu_bo(bo)))
		return false;

	default:
		break;
	}

	return ttm_bo_eviction_valuable(bo, place);
}

+2 −15
Original line number Diff line number Diff line
@@ -276,17 +276,9 @@ bool ttm_resource_intersects(struct ttm_device *bdev,
	if (!res)
		return false;

	if (!place)
		return true;

	man = ttm_manager_type(bdev, res->mem_type);
	if (!man->func->intersects) {
		if (place->fpfn >= (res->start + res->num_pages) ||
		    (place->lpfn && place->lpfn <= res->start))
			return false;

	if (!place || !man->func->intersects)
		return true;
	}

	return man->func->intersects(man, res, place, size);
}
@@ -314,13 +306,8 @@ bool ttm_resource_compatible(struct ttm_device *bdev,
		return false;

	man = ttm_manager_type(bdev, res->mem_type);
	if (!man->func->compatible) {
		if (res->start < place->fpfn ||
		    (place->lpfn && (res->start + res->num_pages) > place->lpfn))
			return false;

	if (!man->func->compatible)
		return true;
	}

	return man->func->compatible(man, res, place, size);
}