Commit 6ccf12ae authored by Wong, Vee Khee's avatar Wong, Vee Khee Committed by David S. Miller
Browse files

net: stmmac: use interrupt mode INTM=1 for multi-MSI 



For interrupt mode INTM=0, TX/RX transfer complete will trigger signal
not only on sbd_perch_[tx|rx]_intr_o (Transmit/Receive Per Channel) but
also on the sbd_intr_o (Common).

As for multi-MSI implementation, setting interrupt mode INTM=1 is more
efficient as each TX intr and RX intr (TI/RI) will be handled by TX/RX ISR
without the need of calling the common MAC ISR.

Updated the TX/RX NORMAL interrupts status checking process as the
NIS status bit is not asserted for any RI/TI events for INTM=1.

Signed-off-by: default avatarWong, Vee Khee <vee.khee.wong@intel.com>
Co-developed-by: default avatarVoon Weifeng <weifeng.voon@intel.com>
Signed-off-by: default avatarVoon Weifeng <weifeng.voon@intel.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent b42446b9

drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c

+7 −0
Original line number Diff line number Diff line
@@ -161,6 +161,13 @@ static void dwmac4_dma_init(void __iomem *ioaddr, 
		value |= DMA_SYS_BUS_EAME;



	writel(value, ioaddr + DMA_SYS_BUS_MODE);



	if (dma_cfg->multi_msi_en) {

		value = readl(ioaddr + DMA_BUS_MODE);

		value &= ~DMA_BUS_MODE_INTM_MASK;

		value |= (DMA_BUS_MODE_INTM_MODE1 << DMA_BUS_MODE_INTM_SHIFT);

		writel(value, ioaddr + DMA_BUS_MODE);

	}

}



static void _dwmac4_dump_dma_regs(void __iomem *ioaddr, u32 channel,

drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h

+3 −0
Original line number Diff line number Diff line
@@ -25,6 +25,9 @@ 
#define DMA_TBS_CTRL			0x00001050



/* DMA Bus Mode bitmap */

#define DMA_BUS_MODE_INTM_MASK		GENMASK(17, 16)

#define DMA_BUS_MODE_INTM_SHIFT		16

#define DMA_BUS_MODE_INTM_MODE1		0x1

#define DMA_BUS_MODE_SFT_RESET		BIT(0)



/* DMA SYS Bus Mode bitmap */

drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c

+11 −12
Original line number Diff line number Diff line
@@ -166,7 +166,7 @@ int dwmac4_dma_interrupt(void __iomem *ioaddr, 
		}

	}

	/* TX/RX NORMAL interrupts */

	if (likely(intr_status & DMA_CHAN_STATUS_NIS)) {

	if (likely(intr_status & DMA_CHAN_STATUS_NIS))

		x->normal_irq_n++;

	if (likely(intr_status & DMA_CHAN_STATUS_RI)) {

		x->rx_normal_irq_n++;
@@ -179,7 +179,6 @@ int dwmac4_dma_interrupt(void __iomem *ioaddr, 
	}

	if (unlikely(intr_status & DMA_CHAN_STATUS_ERI))

		x->rx_early_irq++;

	}



	writel(intr_status & intr_en, ioaddr + DMA_CHAN_STATUS(chan));

	return ret;

drivers/net/ethernet/stmicro/stmmac/stmmac_main.c

+1 −0
Original line number Diff line number Diff line
@@ -5620,6 +5620,7 @@ int stmmac_dvr_probe(struct device *device, 
	priv->plat = plat_dat;

	priv->ioaddr = res->addr;

	priv->dev->base_addr = (unsigned long)res->addr;

	priv->plat->dma_cfg->multi_msi_en = priv->plat->multi_msi_en;



	priv->dev->irq = res->irq;

	priv->wol_irq = res->wol_irq;

include/linux/stmmac.h

+1 −0
Original line number Diff line number Diff line
@@ -96,6 +96,7 @@ struct stmmac_dma_cfg { 
	int mixed_burst;

	bool aal;

	bool eame;

	bool multi_msi_en;

};



#define AXI_BLEN	7