Commit 6cc859ca authored by Biju Das's avatar Biju Das Committed by Geert Uytterhoeven
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clk: renesas: rzg2l: Add PLL5_4 clk mux support 



Add PLL5_4 clk mux support to select clock from clock
sources FOUTPOSTDIV and FOUT1PH0.

Signed-off-by: default avatarBiju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220430114156.6260-3-biju.das.jz@bp.renesas.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 1561380e
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