Commit 6cc67194 authored by Miguel Luis's avatar Miguel Luis Committed by Junhao He
Browse files

arm64: Add missing _EL2 encodings 

mainline inclusion
from mainline-v6.7-rc1
commit 41f6c9344713e6b895a77f2bdd596cf56d4cc197
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I8EC9K
CVE: NA

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=41f6c9344713e6b895a77f2bdd596cf56d4cc197



--------------------------------

Some _EL2 encodings are missing. Add them.

Signed-off-by: default avatarMiguel Luis <miguel.luis@oracle.com>
Reviewed-by: default avatarEric Auger <eric.auger@redhat.com>
[maz: dropped secure encodings]
Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20231023095444.1587322-3-maz@kernel.org


Signed-off-by: default avatarOliver Upton <oliver.upton@linux.dev>
Signed-off-by: default avatarJunhao He <hejunhao3@huawei.com>
parent 5d458cf7

arch/arm64/include/asm/sysreg.h

+18 −0
Original line number Diff line number Diff line
@@ -272,6 +272,8 @@ 
/* ETM */

#define SYS_TRCOSLAR			sys_reg(2, 1, 1, 0, 4)



#define SYS_BRBCR_EL2			sys_reg(2, 4, 9, 0, 0)



#define SYS_MIDR_EL1			sys_reg(3, 0, 0, 0, 0)

#define SYS_MPIDR_EL1			sys_reg(3, 0, 0, 0, 5)

#define SYS_REVIDR_EL1			sys_reg(3, 0, 0, 0, 6)
@@ -488,6 +490,7 @@ 


#define SYS_SCTLR_EL2			sys_reg(3, 4, 1, 0, 0)

#define SYS_ACTLR_EL2			sys_reg(3, 4, 1, 0, 1)

#define SYS_SCTLR2_EL2			sys_reg(3, 4, 1, 0, 3)

#define SYS_HCR_EL2			sys_reg(3, 4, 1, 1, 0)

#define SYS_MDCR_EL2			sys_reg(3, 4, 1, 1, 1)

#define SYS_CPTR_EL2			sys_reg(3, 4, 1, 1, 2)
@@ -501,6 +504,7 @@ 
#define SYS_VTCR_EL2			sys_reg(3, 4, 2, 1, 2)



#define SYS_TRFCR_EL2			sys_reg(3, 4, 1, 2, 1)

#define SYS_VNCR_EL2			sys_reg(3, 4, 2, 2, 0)

#define SYS_HAFGRTR_EL2			sys_reg(3, 4, 3, 1, 6)

#define SYS_SPSR_EL2			sys_reg(3, 4, 4, 0, 0)

#define SYS_ELR_EL2			sys_reg(3, 4, 4, 0, 1)
@@ -573,9 +577,23 @@ 


#define SYS_CONTEXTIDR_EL2		sys_reg(3, 4, 13, 0, 1)

#define SYS_TPIDR_EL2			sys_reg(3, 4, 13, 0, 2)

#define SYS_SCXTNUM_EL2			sys_reg(3, 4, 13, 0, 7)



#define __AMEV_op2(m)			(m & 0x7)

#define __AMEV_CRm(n, m)		(n | ((m & 0x8) >> 3))

#define __SYS__AMEVCNTVOFF0n_EL2(m)	sys_reg(3, 4, 13, __AMEV_CRm(0x8, m), __AMEV_op2(m))

#define SYS_AMEVCNTVOFF0n_EL2(m)	__SYS__AMEVCNTVOFF0n_EL2(m)

#define __SYS__AMEVCNTVOFF1n_EL2(m)	sys_reg(3, 4, 13, __AMEV_CRm(0xA, m), __AMEV_op2(m))

#define SYS_AMEVCNTVOFF1n_EL2(m)	__SYS__AMEVCNTVOFF1n_EL2(m)



#define SYS_CNTVOFF_EL2			sys_reg(3, 4, 14, 0, 3)

#define SYS_CNTHCTL_EL2			sys_reg(3, 4, 14, 1, 0)

#define SYS_CNTHP_TVAL_EL2		sys_reg(3, 4, 14, 2, 0)

#define SYS_CNTHP_CTL_EL2		sys_reg(3, 4, 14, 2, 1)

#define SYS_CNTHP_CVAL_EL2		sys_reg(3, 4, 14, 2, 2)

#define SYS_CNTHV_TVAL_EL2		sys_reg(3, 4, 14, 3, 0)

#define SYS_CNTHV_CTL_EL2		sys_reg(3, 4, 14, 3, 1)

#define SYS_CNTHV_CVAL_EL2		sys_reg(3, 4, 14, 3, 2)



/* VHE encodings for architectural EL0/1 system registers */

#define SYS_BRBCR_EL12			sys_reg(2, 5, 9, 0, 0)