Commit 6c0d1dc2 authored Mar 31, 2023 by Garmin.Chang Committed by Stephen Boyd Mar 31, 2023

clk: mediatek: Add MT8188 topckgen clock support

Add MT8188 topckgen clock controller which provides muxes, dividers
to handle variety clock selection in other IP blocks.

Signed-off-by: Garmin.Chang <Garmin.Chang@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20230331123621.16167-4-Garmin.Chang@mediatek.com

Signed-off-by: Stephen Boyd <sboyd@kernel.org>

parent 28b2bc99

drivers/clk/mediatek/Makefile

+1 −1

Original line number	Diff line number	Diff line
		@@ -100,7 +100,7 @@ obj-$(CONFIG_COMMON_CLK_MT8186_MMSYS) += clk-mt8186-mm.o
		obj-$(CONFIG_COMMON_CLK_MT8186_VDECSYS) += clk-mt8186-vdec.o
		obj-$(CONFIG_COMMON_CLK_MT8186_VENCSYS) += clk-mt8186-venc.o
		obj-$(CONFIG_COMMON_CLK_MT8186_WPESYS) += clk-mt8186-wpe.o
		obj-$(CONFIG_COMMON_CLK_MT8188) += clk-mt8188-apmixedsys.o
		obj-$(CONFIG_COMMON_CLK_MT8188) += clk-mt8188-apmixedsys.o clk-mt8188-topckgen.o
		obj-$(CONFIG_COMMON_CLK_MT8192) += clk-mt8192-apmixedsys.o clk-mt8192.o
		obj-$(CONFIG_COMMON_CLK_MT8192_AUDSYS) += clk-mt8192-aud.o
		obj-$(CONFIG_COMMON_CLK_MT8192_CAMSYS) += clk-mt8192-cam.o

drivers/clk/mediatek/clk-mt8188-topckgen.c

0 → 100644

+1350 −0

File added.

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