Commit 6b2748ad authored by Liu Peibao's avatar Liu Peibao Committed by Marc Zyngier
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dt-bindings: interrupt-controller: add yaml for LoongArch CPU interrupt controller 



Current LoongArch compatible CPUs support 14 CPU IRQs. We can describe how
the 14 IRQs are wired to the platform's internal interrupt controller by
devicetree.

Signed-off-by: default avatarLiu Peibao <liupeibao@loongson.cn>
Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20221114113824.1880-3-liupeibao@loongson.cn
parent 855d4ca4

Documentation/devicetree/bindings/interrupt-controller/loongarch,cpu-interrupt-controller.yaml

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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause

%YAML 1.2

---

$id: http://devicetree.org/schemas/interrupt-controller/loongarch,cpu-interrupt-controller.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: LoongArch CPU Interrupt Controller



maintainers:

  - Liu Peibao <liupeibao@loongson.cn>



properties:

  compatible:

    const: loongarch,cpu-interrupt-controller



  '#interrupt-cells':

    const: 1



  interrupt-controller: true



additionalProperties: false



required:

  - compatible

  - '#interrupt-cells'

  - interrupt-controller



examples:

  - |

    interrupt-controller {

      compatible = "loongarch,cpu-interrupt-controller";

      #interrupt-cells = <1>;

      interrupt-controller;

    };