Commit 6abaa020 authored by Ian Rogers's avatar Ian Rogers Committed by Arnaldo Carvalho de Melo
Browse files

perf vendor events intel: Refresh westmereex events

Update the westmereex events using the new tooling from:

  https://github.com/intel/perfmon



The events are unchanged but unused json values are removed. This
increases consistency across the json files.

Signed-off-by: default avatarIan Rogers <irogers@google.com>
Acked-by: default avatarKan Liang <kan.liang@linux.intel.com>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Caleb Biggers <caleb.biggers@intel.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: John Garry <john.g.garry@oracle.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Perry Taylor <perry.taylor@intel.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: Xing Zhengjun <zhengjun.xing@linux.intel.com>
Link: https://lore.kernel.org/r/20221215065510.1621979-24-irogers@google.com


Signed-off-by: default avatarArnaldo Carvalho de Melo <acme@redhat.com>
parent bcea0838
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+0 −516

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+0 −28
Original line number Diff line number Diff line
[
    {
        "BriefDescription": "X87 Floating point assists (Precise Event)",
        "Counter": "0,1,2,3",
        "EventCode": "0xF7",
        "EventName": "FP_ASSIST.ALL",
        "PEBS": "1",
@@ -10,7 +9,6 @@
    },
    {
        "BriefDescription": "X87 Floating poiint assists for invalid input value (Precise Event)",
        "Counter": "0,1,2,3",
        "EventCode": "0xF7",
        "EventName": "FP_ASSIST.INPUT",
        "PEBS": "1",
@@ -19,7 +17,6 @@
    },
    {
        "BriefDescription": "X87 Floating point assists for invalid output value (Precise Event)",
        "Counter": "0,1,2,3",
        "EventCode": "0xF7",
        "EventName": "FP_ASSIST.OUTPUT",
        "PEBS": "1",
@@ -28,7 +25,6 @@
    },
    {
        "BriefDescription": "MMX Uops",
        "Counter": "0,1,2,3",
        "EventCode": "0x10",
        "EventName": "FP_COMP_OPS_EXE.MMX",
        "SampleAfterValue": "2000000",
@@ -36,7 +32,6 @@
    },
    {
        "BriefDescription": "SSE2 integer Uops",
        "Counter": "0,1,2,3",
        "EventCode": "0x10",
        "EventName": "FP_COMP_OPS_EXE.SSE2_INTEGER",
        "SampleAfterValue": "2000000",
@@ -44,7 +39,6 @@
    },
    {
        "BriefDescription": "SSE* FP double precision Uops",
        "Counter": "0,1,2,3",
        "EventCode": "0x10",
        "EventName": "FP_COMP_OPS_EXE.SSE_DOUBLE_PRECISION",
        "SampleAfterValue": "2000000",
@@ -52,7 +46,6 @@
    },
    {
        "BriefDescription": "SSE and SSE2 FP Uops",
        "Counter": "0,1,2,3",
        "EventCode": "0x10",
        "EventName": "FP_COMP_OPS_EXE.SSE_FP",
        "SampleAfterValue": "2000000",
@@ -60,7 +53,6 @@
    },
    {
        "BriefDescription": "SSE FP packed Uops",
        "Counter": "0,1,2,3",
        "EventCode": "0x10",
        "EventName": "FP_COMP_OPS_EXE.SSE_FP_PACKED",
        "SampleAfterValue": "2000000",
@@ -68,7 +60,6 @@
    },
    {
        "BriefDescription": "SSE FP scalar Uops",
        "Counter": "0,1,2,3",
        "EventCode": "0x10",
        "EventName": "FP_COMP_OPS_EXE.SSE_FP_SCALAR",
        "SampleAfterValue": "2000000",
@@ -76,7 +67,6 @@
    },
    {
        "BriefDescription": "SSE* FP single precision Uops",
        "Counter": "0,1,2,3",
        "EventCode": "0x10",
        "EventName": "FP_COMP_OPS_EXE.SSE_SINGLE_PRECISION",
        "SampleAfterValue": "2000000",
@@ -84,7 +74,6 @@
    },
    {
        "BriefDescription": "Computational floating-point operations executed",
        "Counter": "0,1,2,3",
        "EventCode": "0x10",
        "EventName": "FP_COMP_OPS_EXE.X87",
        "SampleAfterValue": "2000000",
@@ -92,7 +81,6 @@
    },
    {
        "BriefDescription": "All Floating Point to and from MMX transitions",
        "Counter": "0,1,2,3",
        "EventCode": "0xCC",
        "EventName": "FP_MMX_TRANS.ANY",
        "SampleAfterValue": "2000000",
@@ -100,7 +88,6 @@
    },
    {
        "BriefDescription": "Transitions from MMX to Floating Point instructions",
        "Counter": "0,1,2,3",
        "EventCode": "0xCC",
        "EventName": "FP_MMX_TRANS.TO_FP",
        "SampleAfterValue": "2000000",
@@ -108,7 +95,6 @@
    },
    {
        "BriefDescription": "Transitions from Floating Point to MMX instructions",
        "Counter": "0,1,2,3",
        "EventCode": "0xCC",
        "EventName": "FP_MMX_TRANS.TO_MMX",
        "SampleAfterValue": "2000000",
@@ -116,7 +102,6 @@
    },
    {
        "BriefDescription": "128 bit SIMD integer pack operations",
        "Counter": "0,1,2,3",
        "EventCode": "0x12",
        "EventName": "SIMD_INT_128.PACK",
        "SampleAfterValue": "200000",
@@ -124,7 +109,6 @@
    },
    {
        "BriefDescription": "128 bit SIMD integer arithmetic operations",
        "Counter": "0,1,2,3",
        "EventCode": "0x12",
        "EventName": "SIMD_INT_128.PACKED_ARITH",
        "SampleAfterValue": "200000",
@@ -132,7 +116,6 @@
    },
    {
        "BriefDescription": "128 bit SIMD integer logical operations",
        "Counter": "0,1,2,3",
        "EventCode": "0x12",
        "EventName": "SIMD_INT_128.PACKED_LOGICAL",
        "SampleAfterValue": "200000",
@@ -140,7 +123,6 @@
    },
    {
        "BriefDescription": "128 bit SIMD integer multiply operations",
        "Counter": "0,1,2,3",
        "EventCode": "0x12",
        "EventName": "SIMD_INT_128.PACKED_MPY",
        "SampleAfterValue": "200000",
@@ -148,7 +130,6 @@
    },
    {
        "BriefDescription": "128 bit SIMD integer shift operations",
        "Counter": "0,1,2,3",
        "EventCode": "0x12",
        "EventName": "SIMD_INT_128.PACKED_SHIFT",
        "SampleAfterValue": "200000",
@@ -156,7 +137,6 @@
    },
    {
        "BriefDescription": "128 bit SIMD integer shuffle/move operations",
        "Counter": "0,1,2,3",
        "EventCode": "0x12",
        "EventName": "SIMD_INT_128.SHUFFLE_MOVE",
        "SampleAfterValue": "200000",
@@ -164,7 +144,6 @@
    },
    {
        "BriefDescription": "128 bit SIMD integer unpack operations",
        "Counter": "0,1,2,3",
        "EventCode": "0x12",
        "EventName": "SIMD_INT_128.UNPACK",
        "SampleAfterValue": "200000",
@@ -172,7 +151,6 @@
    },
    {
        "BriefDescription": "SIMD integer 64 bit pack operations",
        "Counter": "0,1,2,3",
        "EventCode": "0xFD",
        "EventName": "SIMD_INT_64.PACK",
        "SampleAfterValue": "200000",
@@ -180,7 +158,6 @@
    },
    {
        "BriefDescription": "SIMD integer 64 bit arithmetic operations",
        "Counter": "0,1,2,3",
        "EventCode": "0xFD",
        "EventName": "SIMD_INT_64.PACKED_ARITH",
        "SampleAfterValue": "200000",
@@ -188,7 +165,6 @@
    },
    {
        "BriefDescription": "SIMD integer 64 bit logical operations",
        "Counter": "0,1,2,3",
        "EventCode": "0xFD",
        "EventName": "SIMD_INT_64.PACKED_LOGICAL",
        "SampleAfterValue": "200000",
@@ -196,7 +172,6 @@
    },
    {
        "BriefDescription": "SIMD integer 64 bit packed multiply operations",
        "Counter": "0,1,2,3",
        "EventCode": "0xFD",
        "EventName": "SIMD_INT_64.PACKED_MPY",
        "SampleAfterValue": "200000",
@@ -204,7 +179,6 @@
    },
    {
        "BriefDescription": "SIMD integer 64 bit shift operations",
        "Counter": "0,1,2,3",
        "EventCode": "0xFD",
        "EventName": "SIMD_INT_64.PACKED_SHIFT",
        "SampleAfterValue": "200000",
@@ -212,7 +186,6 @@
    },
    {
        "BriefDescription": "SIMD integer 64 bit shuffle/move operations",
        "Counter": "0,1,2,3",
        "EventCode": "0xFD",
        "EventName": "SIMD_INT_64.SHUFFLE_MOVE",
        "SampleAfterValue": "200000",
@@ -220,7 +193,6 @@
    },
    {
        "BriefDescription": "SIMD integer 64 bit unpack operations",
        "Counter": "0,1,2,3",
        "EventCode": "0xFD",
        "EventName": "SIMD_INT_64.UNPACK",
        "SampleAfterValue": "200000",
+0 −3
Original line number Diff line number Diff line
[
    {
        "BriefDescription": "Instructions decoded",
        "Counter": "0,1,2,3",
        "EventCode": "0xD0",
        "EventName": "MACRO_INSTS.DECODED",
        "SampleAfterValue": "2000000",
@@ -9,7 +8,6 @@
    },
    {
        "BriefDescription": "Macro-fused instructions decoded",
        "Counter": "0,1,2,3",
        "EventCode": "0xA6",
        "EventName": "MACRO_INSTS.FUSIONS_DECODED",
        "SampleAfterValue": "2000000",
@@ -17,7 +15,6 @@
    },
    {
        "BriefDescription": "Two Uop instructions decoded",
        "Counter": "0,1,2,3",
        "EventCode": "0x19",
        "EventName": "TWO_UOP_INSTS_DECODED",
        "SampleAfterValue": "2000000",
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[
    {
        "BriefDescription": "ES segment renames",
        "Counter": "0,1,2,3",
        "EventCode": "0xD5",
        "EventName": "ES_REG_RENAMES",
        "SampleAfterValue": "2000000",
@@ -9,7 +8,6 @@
    },
    {
        "BriefDescription": "I/O transactions",
        "Counter": "0,1,2,3",
        "EventCode": "0x6C",
        "EventName": "IO_TRANSACTIONS",
        "SampleAfterValue": "2000000",
@@ -17,7 +15,6 @@
    },
    {
        "BriefDescription": "L1I instruction fetch stall cycles",
        "Counter": "0,1,2,3",
        "EventCode": "0x80",
        "EventName": "L1I.CYCLES_STALLED",
        "SampleAfterValue": "2000000",
@@ -25,7 +22,6 @@
    },
    {
        "BriefDescription": "L1I instruction fetch hits",
        "Counter": "0,1,2,3",
        "EventCode": "0x80",
        "EventName": "L1I.HITS",
        "SampleAfterValue": "2000000",
@@ -33,7 +29,6 @@
    },
    {
        "BriefDescription": "L1I instruction fetch misses",
        "Counter": "0,1,2,3",
        "EventCode": "0x80",
        "EventName": "L1I.MISSES",
        "SampleAfterValue": "2000000",
@@ -41,7 +36,6 @@
    },
    {
        "BriefDescription": "L1I Instruction fetches",
        "Counter": "0,1,2,3",
        "EventCode": "0x80",
        "EventName": "L1I.READS",
        "SampleAfterValue": "2000000",
@@ -49,7 +43,6 @@
    },
    {
        "BriefDescription": "Large ITLB hit",
        "Counter": "0,1,2,3",
        "EventCode": "0x82",
        "EventName": "LARGE_ITLB.HIT",
        "SampleAfterValue": "200000",
@@ -57,7 +50,6 @@
    },
    {
        "BriefDescription": "Loads that partially overlap an earlier store",
        "Counter": "0,1,2,3",
        "EventCode": "0x3",
        "EventName": "LOAD_BLOCK.OVERLAP_STORE",
        "SampleAfterValue": "200000",
@@ -65,7 +57,6 @@
    },
    {
        "BriefDescription": "All loads dispatched",
        "Counter": "0,1,2,3",
        "EventCode": "0x13",
        "EventName": "LOAD_DISPATCH.ANY",
        "SampleAfterValue": "2000000",
@@ -73,7 +64,6 @@
    },
    {
        "BriefDescription": "Loads dispatched from the MOB",
        "Counter": "0,1,2,3",
        "EventCode": "0x13",
        "EventName": "LOAD_DISPATCH.MOB",
        "SampleAfterValue": "2000000",
@@ -81,7 +71,6 @@
    },
    {
        "BriefDescription": "Loads dispatched that bypass the MOB",
        "Counter": "0,1,2,3",
        "EventCode": "0x13",
        "EventName": "LOAD_DISPATCH.RS",
        "SampleAfterValue": "2000000",
@@ -89,7 +78,6 @@
    },
    {
        "BriefDescription": "Loads dispatched from stage 305",
        "Counter": "0,1,2,3",
        "EventCode": "0x13",
        "EventName": "LOAD_DISPATCH.RS_DELAYED",
        "SampleAfterValue": "2000000",
@@ -97,7 +85,6 @@
    },
    {
        "BriefDescription": "False dependencies due to partial address aliasing",
        "Counter": "0,1,2,3",
        "EventCode": "0x7",
        "EventName": "PARTIAL_ADDRESS_ALIAS",
        "SampleAfterValue": "200000",
@@ -105,7 +92,6 @@
    },
    {
        "BriefDescription": "All Store buffer stall cycles",
        "Counter": "0,1,2,3",
        "EventCode": "0x4",
        "EventName": "SB_DRAIN.ANY",
        "SampleAfterValue": "200000",
@@ -113,7 +99,6 @@
    },
    {
        "BriefDescription": "Segment rename stall cycles",
        "Counter": "0,1,2,3",
        "EventCode": "0xD4",
        "EventName": "SEG_RENAME_STALLS",
        "SampleAfterValue": "2000000",
@@ -121,7 +106,6 @@
    },
    {
        "BriefDescription": "Snoop code requests",
        "Counter": "0,1,2,3",
        "EventCode": "0xB4",
        "EventName": "SNOOPQ_REQUESTS.CODE",
        "SampleAfterValue": "100000",
@@ -129,7 +113,6 @@
    },
    {
        "BriefDescription": "Snoop data requests",
        "Counter": "0,1,2,3",
        "EventCode": "0xB4",
        "EventName": "SNOOPQ_REQUESTS.DATA",
        "SampleAfterValue": "100000",
@@ -137,7 +120,6 @@
    },
    {
        "BriefDescription": "Snoop invalidate requests",
        "Counter": "0,1,2,3",
        "EventCode": "0xB4",
        "EventName": "SNOOPQ_REQUESTS.INVALIDATE",
        "SampleAfterValue": "100000",
@@ -190,7 +172,6 @@
    },
    {
        "BriefDescription": "Thread responded HIT to snoop",
        "Counter": "0,1,2,3",
        "EventCode": "0xB8",
        "EventName": "SNOOP_RESPONSE.HIT",
        "SampleAfterValue": "100000",
@@ -198,7 +179,6 @@
    },
    {
        "BriefDescription": "Thread responded HITE to snoop",
        "Counter": "0,1,2,3",
        "EventCode": "0xB8",
        "EventName": "SNOOP_RESPONSE.HITE",
        "SampleAfterValue": "100000",
@@ -206,7 +186,6 @@
    },
    {
        "BriefDescription": "Thread responded HITM to snoop",
        "Counter": "0,1,2,3",
        "EventCode": "0xB8",
        "EventName": "SNOOP_RESPONSE.HITM",
        "SampleAfterValue": "100000",
@@ -214,7 +193,6 @@
    },
    {
        "BriefDescription": "Super Queue full stall cycles",
        "Counter": "0,1,2,3",
        "EventCode": "0xF6",
        "EventName": "SQ_FULL_STALL_CYCLES",
        "SampleAfterValue": "2000000",
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