Commit 6a2a235a authored by Alex Williamson's avatar Alex Williamson
Browse files

Merge branches 'v5.13/vfio/embed-vfio_device', 'v5.13/vfio/misc' and...


Merge branches 'v5.13/vfio/embed-vfio_device', 'v5.13/vfio/misc' and 'v5.13/vfio/nvlink' into v5.13/vfio/next

Spelling fixes merged with file deletion.

Conflicts:
	drivers/vfio/pci/vfio_pci_nvlink2.c

Signed-off-by: default avatarAlex Williamson <alex.williamson@redhat.com>
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/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * Mediated device interal definitions
 * Mediated device internal definitions
 *
 * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
 *     Author: Neo Jia <cjia@nvidia.com>
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@@ -39,9 +39,3 @@ config VFIO_PCI_IGD
	  and LPC bridge config space.

	  To enable Intel IGD assignment through vfio-pci, say Y.

config VFIO_PCI_NVLINK2
	def_bool y
	depends on VFIO_PCI && PPC_POWERNV && SPAPR_TCE_IOMMU
	help
	  VFIO PCI support for P9 Witherspoon machine with NVIDIA V100 GPUs
+0 −1
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@@ -2,7 +2,6 @@

vfio-pci-y := vfio_pci.o vfio_pci_intrs.o vfio_pci_rdwr.o vfio_pci_config.o
vfio-pci-$(CONFIG_VFIO_PCI_IGD) += vfio_pci_igd.o
vfio-pci-$(CONFIG_VFIO_PCI_NVLINK2) += vfio_pci_nvlink2.o
vfio-pci-$(CONFIG_S390) += vfio_pci_zdev.o

obj-$(CONFIG_VFIO_PCI) += vfio-pci.o
+1 −20
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@@ -378,7 +378,6 @@ static int vfio_pci_enable(struct vfio_pci_device *vdev)
	if (!vfio_vga_disabled() && vfio_pci_is_vga(pdev))
		vdev->has_vga = true;


	if (vfio_pci_is_vga(pdev) &&
	    pdev->vendor == PCI_VENDOR_ID_INTEL &&
	    IS_ENABLED(CONFIG_VFIO_PCI_IGD)) {
@@ -389,24 +388,6 @@ static int vfio_pci_enable(struct vfio_pci_device *vdev)
		}
	}

	if (pdev->vendor == PCI_VENDOR_ID_NVIDIA &&
	    IS_ENABLED(CONFIG_VFIO_PCI_NVLINK2)) {
		ret = vfio_pci_nvdia_v100_nvlink2_init(vdev);
		if (ret && ret != -ENODEV) {
			pci_warn(pdev, "Failed to setup NVIDIA NV2 RAM region\n");
			goto disable_exit;
		}
	}

	if (pdev->vendor == PCI_VENDOR_ID_IBM &&
	    IS_ENABLED(CONFIG_VFIO_PCI_NVLINK2)) {
		ret = vfio_pci_ibm_npu2_init(vdev);
		if (ret && ret != -ENODEV) {
			pci_warn(pdev, "Failed to setup NVIDIA NV2 ATSD region\n");
			goto disable_exit;
		}
	}

	vfio_pci_probe_mmaps(vdev);

	return 0;
@@ -2434,7 +2415,7 @@ static int __init vfio_pci_init(void)
{
	int ret;

	/* Allocate shared config space permision data used by all devices */
	/* Allocate shared config space permission data used by all devices */
	ret = vfio_pci_init_perm_bits();
	if (ret)
		return ret;
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@@ -101,7 +101,7 @@ static const u16 pci_ext_cap_length[PCI_EXT_CAP_ID_MAX + 1] = {
/*
 * Read/Write Permission Bits - one bit for each bit in capability
 * Any field can be read if it exists, but what is read depends on
 * whether the field is 'virtualized', or just pass thru to the
 * whether the field is 'virtualized', or just pass through to the
 * hardware.  Any virtualized field is also virtualized for writes.
 * Writes are only permitted if they have a 1 bit here.
 */
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