Commit 6a26f141 authored by Jacopo Mondi's avatar Jacopo Mondi Committed by Mauro Carvalho Chehab
Browse files

media: i2c: mt9t112: Remove soc_camera dependencies 



Remove soc_camera framework dependencies from mt9t112 sensor driver.
- Handle clk, gpios and power routines
- Register async subdev
- Remove deprecated g/s_mbus_config operations
- Remove driver flags
- Change driver interface and add kernel doc
- Adjust build system
- Fix code style issues reported by checkpatch in strict mode

This commit does not remove the original soc_camera based driver as long
as other platforms depends on soc_camera framework.

As I don't have access to a working camera module, this change has only
been compile tested.

Signed-off-by: default avatarJacopo Mondi <jacopo+renesas@jmondi.org>
Signed-off-by: default avatarHans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab@s-opensource.com>
parent 7641b044

drivers/media/i2c/Kconfig

+11 −0
Original line number Diff line number Diff line
@@ -788,6 +788,17 @@ config VIDEO_MT9T001 
	  This is a Video4Linux2 sensor-level driver for the Aptina

	  (Micron) mt0t001 3 Mpixel camera.



config VIDEO_MT9T112

	tristate "Aptina MT9T111/MT9T112 support"

	depends on I2C && VIDEO_V4L2

	depends on MEDIA_CAMERA_SUPPORT

	---help---

	  This is a Video4Linux2 sensor-level driver for the Aptina

	  (Micron) MT9T111 and MT9T112 3 Mpixel camera.



	  To compile this driver as a module, choose M here: the

	  module will be called mt9t112.



config VIDEO_MT9V011

	tristate "Micron mt9v011 sensor support"

	depends on I2C && VIDEO_V4L2

drivers/media/i2c/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -80,6 +80,7 @@ obj-$(CONFIG_VIDEO_MT9M032) += mt9m032.o 
obj-$(CONFIG_VIDEO_MT9M111) += mt9m111.o

obj-$(CONFIG_VIDEO_MT9P031) += mt9p031.o

obj-$(CONFIG_VIDEO_MT9T001) += mt9t001.o

obj-$(CONFIG_VIDEO_MT9T112) += mt9t112.o

obj-$(CONFIG_VIDEO_MT9V011) += mt9v011.o

obj-$(CONFIG_VIDEO_MT9V032) += mt9v032.o

obj-$(CONFIG_VIDEO_SR030PC30)	+= sr030pc30.o

drivers/media/i2c/mt9t112.c

+190 −213
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0

/*

 * mt9t112 Camera Driver

 *

 * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org>

 *

 * Copyright (C) 2009 Renesas Solutions Corp.

 * Kuninori Morimoto <morimoto.kuninori@renesas.com>

 *
@@ -12,12 +15,14 @@ 
 * Copyright (C) 2008 Magnus Damm

 * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 * TODO: This driver lacks support for frame rate control due to missing

 *	 register level documentation and suitable hardware for testing.

 *	 v4l-utils compliance tools will report errors.

 */



#include <linux/clk.h>

#include <linux/delay.h>

#include <linux/gpio/consumer.h>

#include <linux/i2c.h>

#include <linux/init.h>

#include <linux/module.h>
@@ -26,17 +31,16 @@ 
#include <linux/videodev2.h>



#include <media/i2c/mt9t112.h>

#include <media/soc_camera.h>

#include <media/v4l2-clk.h>

#include <media/v4l2-common.h>

#include <media/v4l2-image-sizes.h>

#include <media/v4l2-subdev.h>



/* you can check PLL/clock info */

/* #define EXT_CLOCK 24000000 */



/************************************************************************

			macro

************************************************************************/

 *			macro

 ***********************************************************************/

/*

 * frame size

 */
@@ -74,8 +78,8 @@ 
#define VAR8(id, offset) _VAR(id, offset, 0x8000)



/************************************************************************

			struct

************************************************************************/

 *			struct

 ***********************************************************************/

struct mt9t112_format {

	u32 code;

	enum v4l2_colorspace colorspace;
@@ -85,21 +89,19 @@ struct mt9t112_format { 


struct mt9t112_priv {

	struct v4l2_subdev		 subdev;

	struct mt9t112_camera_info	*info;

	struct mt9t112_platform_data	*info;

	struct i2c_client		*client;

	struct v4l2_rect		 frame;

	struct v4l2_clk			*clk;

	struct clk			*clk;

	struct gpio_desc		*standby_gpio;

	const struct mt9t112_format	*format;

	int				 num_formats;

	u32				 flags;

/* for flags */

#define INIT_DONE	(1 << 0)

#define PCLK_RISING	(1 << 1)

	bool				 init_done;

};



/************************************************************************

			supported format

************************************************************************/

 *			supported format

 ***********************************************************************/



static const struct mt9t112_format mt9t112_cfmts[] = {

	{
@@ -136,8 +138,8 @@ static const struct mt9t112_format mt9t112_cfmts[] = { 
};



/************************************************************************

			general function

************************************************************************/

 *			general function

 ***********************************************************************/

static struct mt9t112_priv *to_mt9t112(const struct i2c_client *client)

{

	return container_of(i2c_get_clientdata(client),
@@ -164,15 +166,15 @@ static int __mt9t112_reg_read(const struct i2c_client *client, u16 command) 
	msg[1].buf   = buf;



	/*

	 * if return value of this function is < 0,

	 * it mean error.

	 * else, under 16bit is valid data.

	 * If return value of this function is < 0, it means error, else,

	 * below 16bit is valid data.

	 */

	ret = i2c_transfer(client->adapter, msg, 2);

	if (ret < 0)

		return ret;



	memcpy(&ret, buf, 2);



	return swab16(ret);

}
@@ -195,22 +197,19 @@ static int __mt9t112_reg_write(const struct i2c_client *client, 
	msg.buf   = buf;



	/*

	 * i2c_transfer return message length,

	 * but this function should return 0 if correct case

	 * i2c_transfer return message length, but this function should

	 * return 0 if correct case.

	 */

	ret = i2c_transfer(client->adapter, &msg, 1);

	if (ret >= 0)

		ret = 0;



	return ret;

	return ret >= 0 ? 0 : ret;

}



static int __mt9t112_reg_mask_set(const struct i2c_client *client,

				  u16  command,

				  u16  mask,

				  u16  set)

				  u16  command, u16  mask, u16  set)

{

	int val = __mt9t112_reg_read(client, command);



	if (val < 0)

		return val;
@@ -245,11 +244,10 @@ static int __mt9t112_mcu_write(const struct i2c_client *client, 
}



static int __mt9t112_mcu_mask_set(const struct i2c_client *client,

				  u16  command,

				  u16  mask,

				  u16  set)

				  u16  command, u16  mask, u16  set)

{

	int val = __mt9t112_mcu_read(client, command);



	if (val < 0)

		return val;
@@ -264,7 +262,7 @@ static int mt9t112_reset(const struct i2c_client *client) 
	int ret;



	mt9t112_reg_mask_set(ret, client, 0x001a, 0x0001, 0x0001);

	msleep(1);

	usleep_range(1000, 5000);

	mt9t112_reg_mask_set(ret, client, 0x001a, 0x0001, 0x0000);



	return ret;
@@ -303,71 +301,64 @@ static int mt9t112_clock_info(const struct i2c_client *client, u32 ext) 
	m = n & 0x00ff;

	n = (n >> 8) & 0x003f;



	enable = ((6000 > ext) || (54000 < ext)) ? "X" : "";

	enable = ((ext < 6000) || (ext > 54000)) ? "X" : "";

	dev_dbg(&client->dev, "EXTCLK          : %10u K %s\n", ext, enable);



	vco = 2 * m * ext / (n + 1);

	enable = ((384000 > vco) || (768000 < vco)) ? "X" : "";

	enable = ((vco < 384000) || (vco > 768000)) ? "X" : "";

	dev_dbg(&client->dev, "VCO             : %10u K %s\n", vco, enable);



	clk = vco / (p1 + 1) / (p2 + 1);

	enable = (96000 < clk) ? "X" : "";

	enable = (clk > 96000) ? "X" : "";

	dev_dbg(&client->dev, "PIXCLK          : %10u K %s\n", clk, enable);



	clk = vco / (p3 + 1);

	enable = (768000 < clk) ? "X" : "";

	enable = (clk > 768000) ? "X" : "";

	dev_dbg(&client->dev, "MIPICLK         : %10u K %s\n", clk, enable);



	clk = vco / (p6 + 1);

	enable = (96000 < clk) ? "X" : "";

	enable = (clk > 96000) ? "X" : "";

	dev_dbg(&client->dev, "MCU CLK         : %10u K %s\n", clk, enable);



	clk = vco / (p5 + 1);

	enable = (54000 < clk) ? "X" : "";

	enable = (clk > 54000) ? "X" : "";

	dev_dbg(&client->dev, "SOC CLK         : %10u K %s\n", clk, enable);



	clk = vco / (p4 + 1);

	enable = (70000 < clk) ? "X" : "";

	enable = (clk > 70000) ? "X" : "";

	dev_dbg(&client->dev, "Sensor CLK      : %10u K %s\n", clk, enable);



	clk = vco / (p7 + 1);

	dev_dbg(&client->dev, "External sensor : %10u K\n", clk);



	clk = ext / (n + 1);

	enable = ((2000 > clk) || (24000 < clk)) ? "X" : "";

	enable = ((clk < 2000) || (clk > 24000)) ? "X" : "";

	dev_dbg(&client->dev, "PFD             : %10u K %s\n", clk, enable);



	return 0;

}

#endif



static void mt9t112_frame_check(u32 *width, u32 *height, u32 *left, u32 *top)

{

	soc_camera_limit_side(left, width, 0, 0, MAX_WIDTH);

	soc_camera_limit_side(top, height, 0, 0, MAX_HEIGHT);

}



static int mt9t112_set_a_frame_size(const struct i2c_client *client,

				   u16 width,

				   u16 height)

				    u16 width, u16 height)

{

	int ret;

	u16 wstart = (MAX_WIDTH - width) / 2;

	u16 hstart = (MAX_HEIGHT - height) / 2;



	/* (Context A) Image Width/Height */

	/* (Context A) Image Width/Height. */

	mt9t112_mcu_write(ret, client, VAR(26, 0), width);

	mt9t112_mcu_write(ret, client, VAR(26, 2), height);



	/* (Context A) Output Width/Height */

	/* (Context A) Output Width/Height. */

	mt9t112_mcu_write(ret, client, VAR(18, 43), 8 + width);

	mt9t112_mcu_write(ret, client, VAR(18, 45), 8 + height);



	/* (Context A) Start Row/Column */

	/* (Context A) Start Row/Column. */

	mt9t112_mcu_write(ret, client, VAR(18, 2), 4 + hstart);

	mt9t112_mcu_write(ret, client, VAR(18, 4), 4 + wstart);



	/* (Context A) End Row/Column */

	/* (Context A) End Row/Column. */

	mt9t112_mcu_write(ret, client, VAR(18, 6), 11 + height + hstart);

	mt9t112_mcu_write(ret, client, VAR(18, 8), 11 + width  + wstart);
@@ -377,35 +368,27 @@ static int mt9t112_set_a_frame_size(const struct i2c_client *client, 
}



static int mt9t112_set_pll_dividers(const struct i2c_client *client,

				    u8 m, u8 n,

				    u8 p1, u8 p2, u8 p3,

				    u8 p4, u8 p5, u8 p6,

				    u8 p7)

				    u8 m, u8 n, u8 p1, u8 p2, u8 p3, u8 p4,

				    u8 p5, u8 p6, u8 p7)

{

	int ret;

	u16 val;



	/* N/M */

	val = (n << 8) |

	      (m << 0);

	val = (n << 8) | (m << 0);

	mt9t112_reg_mask_set(ret, client, 0x0010, 0x3fff, val);



	/* P1/P2/P3 */

	val = ((p3 & 0x0F) << 8) |

	      ((p2 & 0x0F) << 4) |

	      ((p1 & 0x0F) << 0);

	val = ((p3 & 0x0F) << 8) | ((p2 & 0x0F) << 4) | ((p1 & 0x0F) << 0);

	mt9t112_reg_mask_set(ret, client, 0x0012, 0x0fff, val);



	/* P4/P5/P6 */

	val = (0x7         << 12) |

	      ((p6 & 0x0F) <<  8) |

	      ((p5 & 0x0F) <<  4) |

	val = (0x7 << 12) | ((p6 & 0x0F) <<  8) | ((p5 & 0x0F) <<  4) |

	      ((p4 & 0x0F) <<  0);

	mt9t112_reg_mask_set(ret, client, 0x002A, 0x7fff, val);



	/* P7 */

	val = (0x1         << 12) |

	      ((p7 & 0x0F) <<  0);

	val = (0x1 << 12) | ((p7 & 0x0F) <<  0);

	mt9t112_reg_mask_set(ret, client, 0x002C, 0x100f, val);



	return ret;
@@ -418,19 +401,15 @@ static int mt9t112_init_pll(const struct i2c_client *client) 


	mt9t112_reg_mask_set(ret, client, 0x0014, 0x003, 0x0001);



	/* PLL control: BYPASS PLL = 8517 */

	/* PLL control: BYPASS PLL = 8517. */

	mt9t112_reg_write(ret, client, 0x0014, 0x2145);



	/* Replace these registers when new timing parameters are generated */

	/* Replace these registers when new timing parameters are generated. */

	mt9t112_set_pll_dividers(client,

				 priv->info->divider.m,

				 priv->info->divider.n,

				 priv->info->divider.p1,

				 priv->info->divider.p2,

				 priv->info->divider.p3,

				 priv->info->divider.p4,

				 priv->info->divider.p5,

				 priv->info->divider.p6,

				 priv->info->divider.m, priv->info->divider.n,

				 priv->info->divider.p1, priv->info->divider.p2,

				 priv->info->divider.p3, priv->info->divider.p4,

				 priv->info->divider.p5, priv->info->divider.p6,

				 priv->info->divider.p7);



	/*
@@ -452,20 +431,21 @@ static int mt9t112_init_pll(const struct i2c_client *client) 
	 * I2C Master Clock Divider

	 */

	mt9t112_reg_write(ret, client, 0x0014, 0x3046);

	mt9t112_reg_write(ret, client, 0x0016, 0x0400); /* JPEG initialization workaround */

	/* JPEG initialization workaround */

	mt9t112_reg_write(ret, client, 0x0016, 0x0400);

	mt9t112_reg_write(ret, client, 0x0022, 0x0190);

	mt9t112_reg_write(ret, client, 0x3B84, 0x0212);



	/* External sensor clock is PLL bypass */

	/* External sensor clock is PLL bypass. */

	mt9t112_reg_write(ret, client, 0x002E, 0x0500);



	mt9t112_reg_mask_set(ret, client, 0x0018, 0x0002, 0x0002);

	mt9t112_reg_mask_set(ret, client, 0x3B82, 0x0004, 0x0004);



	/* MCU disabled */

	/* MCU disabled. */

	mt9t112_reg_mask_set(ret, client, 0x0018, 0x0004, 0x0004);



	/* out of standby */

	/* Out of standby. */

	mt9t112_reg_mask_set(ret, client, 0x0018, 0x0001, 0);



	mdelay(50);
@@ -487,10 +467,10 @@ static int mt9t112_init_pll(const struct i2c_client *client) 
	mt9t112_reg_write(ret, client, 0x0614, 0x0001);

	mdelay(1);



	/* poll to verify out of standby. Must Poll this bit */

	/* Poll to verify out of standby. Must Poll this bit. */

	for (i = 0; i < 100; i++) {

		mt9t112_reg_read(data, client, 0x0018);

		if (!(0x4000 & data))

		if (!(data & 0x4000))

			break;



		mdelay(10);
@@ -501,7 +481,6 @@ static int mt9t112_init_pll(const struct i2c_client *client) 


static int mt9t112_init_setting(const struct i2c_client *client)

{



	int ret;



	/* Adaptive Output Clock (A) */
@@ -562,11 +541,11 @@ static int mt9t112_init_setting(const struct i2c_client *client) 
	mt9t112_mcu_write(ret, client, VAR(18, 109), 0x0AF0);



	/*

	 * Flicker Dectection registers

	 * This section should be replaced whenever new Timing file is generated

	 * All the following registers need to be replaced

	 * Flicker Dectection registers.

	 * This section should be replaced whenever new timing file is

	 * generated. All the following registers need to be replaced.

	 * Following registers are generated from Register Wizard but user can

	 * modify them. For detail see auto flicker detection tuning

	 * modify them. For detail see auto flicker detection tuning.

	 */



	/* FD_FDPERIOD_SELECT */
@@ -579,47 +558,47 @@ static int mt9t112_init_setting(const struct i2c_client *client) 
	mt9t112_mcu_write(ret, client, VAR(26, 17), 0x0003);



	/*

	 * AFD range detection tuning registers

	 * AFD range detection tuning registers.

	 */



	/* search_f1_50 */

	/* Search_f1_50 */

	mt9t112_mcu_write(ret, client, VAR8(18, 165), 0x25);



	/* search_f2_50 */

	/* Search_f2_50 */

	mt9t112_mcu_write(ret, client, VAR8(18, 166), 0x28);



	/* search_f1_60 */

	/* Search_f1_60 */

	mt9t112_mcu_write(ret, client, VAR8(18, 167), 0x2C);



	/* search_f2_60 */

	/* Search_f2_60 */

	mt9t112_mcu_write(ret, client, VAR8(18, 168), 0x2F);



	/* period_50Hz (A) */

	/* Period_50Hz (A) */

	mt9t112_mcu_write(ret, client, VAR8(18, 68), 0xBA);



	/* secret register by aptina */

	/* period_50Hz (A MSB) */

	/* Secret register by Aptina. */

	/* Period_50Hz (A MSB) */

	mt9t112_mcu_write(ret, client, VAR8(18, 303), 0x00);



	/* period_60Hz (A) */

	/* Period_60Hz (A) */

	mt9t112_mcu_write(ret, client, VAR8(18, 69), 0x9B);



	/* secret register by aptina */

	/* period_60Hz (A MSB) */

	/* Secret register by Aptina. */

	/* Period_60Hz (A MSB) */

	mt9t112_mcu_write(ret, client, VAR8(18, 301), 0x00);



	/* period_50Hz (B) */

	/* Period_50Hz (B) */

	mt9t112_mcu_write(ret, client, VAR8(18, 140), 0x82);



	/* secret register by aptina */

	/* period_50Hz (B) MSB */

	/* Secret register by Aptina. */

	/* Period_50Hz (B) MSB */

	mt9t112_mcu_write(ret, client, VAR8(18, 304), 0x00);



	/* period_60Hz (B) */

	/* Period_60Hz (B) */

	mt9t112_mcu_write(ret, client, VAR8(18, 141), 0x6D);



	/* secret register by aptina */

	/* period_60Hz (B) MSB */

	/* Secret register by Aptina. */

	/* Period_60Hz (B) MSB */

	mt9t112_mcu_write(ret, client, VAR8(18, 302), 0x00);



	/* FD Mode */
@@ -693,49 +672,50 @@ static int mt9t112_init_camera(const struct i2c_client *client) 
	int ret;



	ECHECKER(ret, mt9t112_reset(client));



	ECHECKER(ret, mt9t112_init_pll(client));



	ECHECKER(ret, mt9t112_init_setting(client));



	ECHECKER(ret, mt9t112_auto_focus_setting(client));



	mt9t112_reg_mask_set(ret, client, 0x0018, 0x0004, 0);



	/* Analog setting B */

	/* Analog setting B.*/

	mt9t112_reg_write(ret, client, 0x3084, 0x2409);

	mt9t112_reg_write(ret, client, 0x3092, 0x0A49);

	mt9t112_reg_write(ret, client, 0x3094, 0x4949);

	mt9t112_reg_write(ret, client, 0x3096, 0x4950);



	/*

	 * Disable adaptive clock

	 * Disable adaptive clock.

	 * PRI_A_CONFIG_JPEG_OB_TX_CONTROL_VAR

	 * PRI_B_CONFIG_JPEG_OB_TX_CONTROL_VAR

	 */

	mt9t112_mcu_write(ret, client, VAR(26, 160), 0x0A2E);

	mt9t112_mcu_write(ret, client, VAR(27, 160), 0x0A2E);



	/* Configure STatus in Status_before_length Format and enable header */

	/* PRI_B_CONFIG_JPEG_OB_TX_CONTROL_VAR */

	/*

	 * Configure Status in Status_before_length Format and enable header.

	 * PRI_B_CONFIG_JPEG_OB_TX_CONTROL_VAR

	 */

	mt9t112_mcu_write(ret, client, VAR(27, 144), 0x0CB4);



	/* Enable JPEG in context B */

	/* PRI_B_CONFIG_JPEG_OB_TX_CONTROL_VAR */

	/*

	 * Enable JPEG in context B.

	 * PRI_B_CONFIG_JPEG_OB_TX_CONTROL_VAR

	 */

	mt9t112_mcu_write(ret, client, VAR8(27, 142), 0x01);



	/* Disable Dac_TXLO */

	/* Disable Dac_TXLO. */

	mt9t112_reg_write(ret, client, 0x316C, 0x350F);



	/* Set max slew rates */

	/* Set max slew rates. */

	mt9t112_reg_write(ret, client, 0x1E, 0x777);



	return ret;

}



/************************************************************************

			v4l2_subdev_core_ops

************************************************************************/

 *			v4l2_subdev_core_ops

 ***********************************************************************/



#ifdef CONFIG_VIDEO_ADV_DEBUG

static int mt9t112_g_register(struct v4l2_subdev *sd,
@@ -764,13 +744,40 @@ static int mt9t112_s_register(struct v4l2_subdev *sd, 
}

#endif



static int mt9t112_power_on(struct mt9t112_priv *priv)

{

	int ret;



	ret = clk_prepare_enable(priv->clk);

	if (ret)

		return ret;



	if (priv->standby_gpio) {

		gpiod_set_value(priv->standby_gpio, 0);

		msleep(100);

	}



	return 0;

}



static int mt9t112_power_off(struct mt9t112_priv *priv)

{

	clk_disable_unprepare(priv->clk);

	if (priv->standby_gpio) {

		gpiod_set_value(priv->standby_gpio, 1);

		msleep(100);

	}



	return 0;

}



static int mt9t112_s_power(struct v4l2_subdev *sd, int on)

{

	struct i2c_client *client = v4l2_get_subdevdata(sd);

	struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);

	struct mt9t112_priv *priv = to_mt9t112(client);



	return soc_camera_set_power(&client->dev, ssdd, priv->clk, on);

	return on ? mt9t112_power_on(priv) :

		    mt9t112_power_off(priv);

}



static const struct v4l2_subdev_core_ops mt9t112_subdev_core_ops = {
@@ -781,10 +788,9 @@ static const struct v4l2_subdev_core_ops mt9t112_subdev_core_ops = { 
	.s_power	= mt9t112_s_power,

};





/************************************************************************

			v4l2_subdev_video_ops

************************************************************************/

 *			v4l2_subdev_video_ops

 **********************************************************************/

static int mt9t112_s_stream(struct v4l2_subdev *sd, int enable)

{

	struct i2c_client *client = v4l2_get_subdevdata(sd);
@@ -794,8 +800,7 @@ static int mt9t112_s_stream(struct v4l2_subdev *sd, int enable) 
	if (!enable) {

		/* FIXME

		 *

		 * If user selected large output size,

		 * and used it long time,

		 * If user selected large output size, and used it long time,

		 * mt9t112 camera will be very warm.

		 *

		 * But current driver can not stop mt9t112 camera.
@@ -805,26 +810,25 @@ static int mt9t112_s_stream(struct v4l2_subdev *sd, int enable) 
		return ret;

	}



	if (!(priv->flags & INIT_DONE)) {

		u16 param = PCLK_RISING & priv->flags ? 0x0001 : 0x0000;

	if (!priv->init_done) {

		u16 param = MT9T112_FLAG_PCLK_RISING_EDGE & priv->info->flags ?

			    0x0001 : 0x0000;



		ECHECKER(ret, mt9t112_init_camera(client));



		/* Invert PCLK (Data sampled on falling edge of pixclk) */

		/* Invert PCLK (Data sampled on falling edge of pixclk). */

		mt9t112_reg_write(ret, client, 0x3C20, param);



		mdelay(5);



		priv->flags |= INIT_DONE;

		priv->init_done = true;

	}



	mt9t112_mcu_write(ret, client, VAR(26, 7), priv->format->fmt);

	mt9t112_mcu_write(ret, client, VAR(26, 9), priv->format->order);

	mt9t112_mcu_write(ret, client, VAR8(1, 0), 0x06);



	mt9t112_set_a_frame_size(client,

				 priv->frame.width,

				 priv->frame.height);

	mt9t112_set_a_frame_size(client, priv->frame.width, priv->frame.height);



	ECHECKER(ret, mt9t112_auto_focus_trigger(client));
@@ -859,8 +863,8 @@ static int mt9t112_set_params(struct mt9t112_priv *priv, 
	/*

	 * frame size check

	 */

	mt9t112_frame_check(&priv->frame.width, &priv->frame.height,

			    &priv->frame.left, &priv->frame.top);

	v4l_bound_align_image(&priv->frame.width, 0, MAX_WIDTH, 0,

			      &priv->frame.height, 0, MAX_HEIGHT, 0, 0);



	priv->format = mt9t112_cfmts + i;
@@ -958,10 +962,9 @@ static int mt9t112_set_fmt(struct v4l2_subdev *sd, 
			   struct v4l2_subdev_pad_config *cfg,

			   struct v4l2_subdev_format *format)

{

	struct v4l2_mbus_framefmt *mf = &format->format;

	struct i2c_client *client = v4l2_get_subdevdata(sd);

	struct v4l2_mbus_framefmt *mf = &format->format;

	struct mt9t112_priv *priv = to_mt9t112(client);

	unsigned int top, left;

	int i;



	if (format->pad)
@@ -978,13 +981,15 @@ static int mt9t112_set_fmt(struct v4l2_subdev *sd, 
		mf->colorspace = mt9t112_cfmts[i].colorspace;

	}



	mt9t112_frame_check(&mf->width, &mf->height, &left, &top);

	v4l_bound_align_image(&mf->width, 0, MAX_WIDTH, 0,

			      &mf->height, 0, MAX_HEIGHT, 0, 0);



	mf->field = V4L2_FIELD_NONE;



	if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE)

		return mt9t112_s_fmt(sd, mf);

	cfg->try_fmt = *mf;



	return 0;

}
@@ -1003,38 +1008,8 @@ static int mt9t112_enum_mbus_code(struct v4l2_subdev *sd, 
	return 0;

}



static int mt9t112_g_mbus_config(struct v4l2_subdev *sd,

				 struct v4l2_mbus_config *cfg)

{

	struct i2c_client *client = v4l2_get_subdevdata(sd);

	struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);



	cfg->flags = V4L2_MBUS_MASTER | V4L2_MBUS_VSYNC_ACTIVE_HIGH |

		V4L2_MBUS_HSYNC_ACTIVE_HIGH | V4L2_MBUS_DATA_ACTIVE_HIGH |

		V4L2_MBUS_PCLK_SAMPLE_RISING | V4L2_MBUS_PCLK_SAMPLE_FALLING;

	cfg->type = V4L2_MBUS_PARALLEL;

	cfg->flags = soc_camera_apply_board_flags(ssdd, cfg);



	return 0;

}



static int mt9t112_s_mbus_config(struct v4l2_subdev *sd,

				 const struct v4l2_mbus_config *cfg)

{

	struct i2c_client *client = v4l2_get_subdevdata(sd);

	struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);

	struct mt9t112_priv *priv = to_mt9t112(client);



	if (soc_camera_apply_board_flags(ssdd, cfg) & V4L2_MBUS_PCLK_SAMPLE_RISING)

		priv->flags |= PCLK_RISING;



	return 0;

}



static const struct v4l2_subdev_video_ops mt9t112_subdev_video_ops = {

	.s_stream	= mt9t112_s_stream,

	.g_mbus_config	= mt9t112_g_mbus_config,

	.s_mbus_config	= mt9t112_s_mbus_config,

};



static const struct v4l2_subdev_pad_ops mt9t112_subdev_pad_ops = {
@@ -1046,8 +1021,8 @@ static const struct v4l2_subdev_pad_ops mt9t112_subdev_pad_ops = { 
};



/************************************************************************

			i2c driver

************************************************************************/

 *			i2c driver

 ***********************************************************************/

static const struct v4l2_subdev_ops mt9t112_subdev_ops = {

	.core	= &mt9t112_subdev_core_ops,

	.video	= &mt9t112_subdev_video_ops,
@@ -1065,9 +1040,7 @@ static int mt9t112_camera_probe(struct i2c_client *client) 
	if (ret < 0)

		return ret;



	/*

	 * check and show chip ID

	 */

	/* Check and show chip ID. */

	mt9t112_reg_read(chipid, client, 0x0000);



	switch (chipid) {
@@ -1089,6 +1062,7 @@ static int mt9t112_camera_probe(struct i2c_client *client) 


done:

	mt9t112_s_power(&priv->subdev, 0);



	return ret;

}
@@ -1096,16 +1070,9 @@ static int mt9t112_probe(struct i2c_client *client, 
			 const struct i2c_device_id *did)

{

	struct mt9t112_priv *priv;

	struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);

	struct v4l2_rect rect = {

		.width = VGA_WIDTH,

		.height = VGA_HEIGHT,

		.left = (MAX_WIDTH - VGA_WIDTH) / 2,

		.top = (MAX_HEIGHT - VGA_HEIGHT) / 2,

	};

	int ret;



	if (!ssdd || !ssdd->drv_priv) {

	if (!client->dev.platform_data) {

		dev_err(&client->dev, "mt9t112: missing platform data!\n");

		return -EINVAL;

	}
@@ -1114,30 +1081,40 @@ static int mt9t112_probe(struct i2c_client *client, 
	if (!priv)

		return -ENOMEM;



	priv->info = ssdd->drv_priv;

	priv->info = client->dev.platform_data;

	priv->init_done = false;



	v4l2_i2c_subdev_init(&priv->subdev, client, &mt9t112_subdev_ops);



	priv->clk = v4l2_clk_get(&client->dev, "mclk");

	if (IS_ERR(priv->clk))

	priv->clk = devm_clk_get(&client->dev, "extclk");

	if (PTR_ERR(priv->clk) == -ENOENT) {

		priv->clk = NULL;

	} else if (IS_ERR(priv->clk)) {

		dev_err(&client->dev, "Unable to get clock \"extclk\"\n");

		return PTR_ERR(priv->clk);

	}



	ret = mt9t112_camera_probe(client);



	/* Cannot fail: using the default supported pixel code */

	if (!ret)

		mt9t112_set_params(priv, &rect, MEDIA_BUS_FMT_UYVY8_2X8);

	else

		v4l2_clk_put(priv->clk);

	priv->standby_gpio = devm_gpiod_get_optional(&client->dev, "standby",

						     GPIOD_OUT_HIGH);

	if (IS_ERR(priv->standby_gpio)) {

		dev_err(&client->dev, "Unable to get gpio \"standby\"\n");

		return PTR_ERR(priv->standby_gpio);

	}



	ret = mt9t112_camera_probe(client);

	if (ret)

		return ret;



	return v4l2_async_register_subdev(&priv->subdev);

}



static int mt9t112_remove(struct i2c_client *client)

{

	struct mt9t112_priv *priv = to_mt9t112(client);



	v4l2_clk_put(priv->clk);

	clk_disable_unprepare(priv->clk);

	v4l2_async_unregister_subdev(&priv->subdev);



	return 0;

}
@@ -1158,6 +1135,6 @@ static struct i2c_driver mt9t112_i2c_driver = { 


module_i2c_driver(mt9t112_i2c_driver);



MODULE_DESCRIPTION("SoC Camera driver for mt9t112");

MODULE_DESCRIPTION("V4L2 driver for MT9T111/MT9T112 camera sensor");

MODULE_AUTHOR("Kuninori Morimoto");

MODULE_LICENSE("GPL v2");

drivers/media/i2c/soc_camera/mt9t112.c

+1 −1
Original line number Diff line number Diff line
@@ -85,7 +85,7 @@ struct mt9t112_format { 


struct mt9t112_priv {

	struct v4l2_subdev		 subdev;

	struct mt9t112_camera_info	*info;

	struct mt9t112_platform_data	*info;

	struct i2c_client		*client;

	struct v4l2_rect		 frame;

	struct v4l2_clk			*clk;

include/media/i2c/mt9t112.h

+7 −10
Original line number Diff line number Diff line 
/*  SPDX-License-Identifier: GPL-2.0 */

/* mt9t112 Camera

 *

 * Copyright (C) 2009 Renesas Solutions Corp.

 * Kuninori Morimoto <morimoto.kuninori@renesas.com>

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 */



#ifndef __MT9T112_H__

#define __MT9T112_H__



#define MT9T112_FLAG_PCLK_RISING_EDGE	(1 << 0)

#define MT9T112_FLAG_DATAWIDTH_8	(1 << 1) /* default width is 10 */



struct mt9t112_pll_divider {

	u8 m, n;

	u8 p1, p2, p3, p4, p5, p6, p7;

};



/*

 * mt9t112 camera info

/**

 * mt9t112_platform_data -	mt9t112 driver interface

 * @flags:			Sensor media bus configuration.

 * @divider:			Sensor PLL configuration

 */

struct mt9t112_camera_info {

struct mt9t112_platform_data {

#define MT9T112_FLAG_PCLK_RISING_EDGE	BIT(0)

	u32 flags;

	struct mt9t112_pll_divider divider;

};