Commit 69092624 authored by Lin Ming's avatar Lin Ming Committed by Ingo Molnar
Browse files

perf: Avoid the percore allocations if the CPU is not HT capable 



Signed-off-by: default avatarLin Ming <ming.m.lin@intel.com>
Signed-off-by: default avatarPeter Zijlstra <a.p.zijlstra@chello.nl>
LKML-Reference: <1299119690-13991-5-git-send-email-ming.m.lin@intel.com>
Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
parent e994d7d2

arch/x86/include/asm/smp.h

+10 −0
Original line number Diff line number Diff line
@@ -17,10 +17,20 @@ 
#endif

#include <asm/thread_info.h>

#include <asm/cpumask.h>

#include <asm/cpufeature.h>



extern int smp_num_siblings;

extern unsigned int num_processors;



static inline bool cpu_has_ht_siblings(void)

{

	bool has_siblings = false;

#ifdef CONFIG_SMP

	has_siblings = cpu_has_ht && smp_num_siblings > 1;

#endif

	return has_siblings;

}



DECLARE_PER_CPU(cpumask_var_t, cpu_sibling_map);

DECLARE_PER_CPU(cpumask_var_t, cpu_core_map);

DECLARE_PER_CPU(u16, cpu_llc_id);

arch/x86/kernel/cpu/perf_event.c

+1 −0
Original line number Diff line number Diff line
@@ -30,6 +30,7 @@ 
#include <asm/stacktrace.h>

#include <asm/nmi.h>

#include <asm/compat.h>

#include <asm/smp.h>



#if 0

#undef wrmsrl

arch/x86/kernel/cpu/perf_event_intel.c

+12 −6
Original line number Diff line number Diff line
@@ -1205,6 +1205,9 @@ static int intel_pmu_cpu_prepare(int cpu) 
{

	struct cpu_hw_events *cpuc = &per_cpu(cpu_hw_events, cpu);



	if (!cpu_has_ht_siblings())

		return NOTIFY_OK;



	cpuc->per_core = kzalloc_node(sizeof(struct intel_percore),

				      GFP_KERNEL, cpu_to_node(cpu));

	if (!cpuc->per_core)
@@ -1221,6 +1224,15 @@ static void intel_pmu_cpu_starting(int cpu) 
	int core_id = topology_core_id(cpu);

	int i;



	init_debug_store_on_cpu(cpu);

	/*

	 * Deal with CPUs that don't clear their LBRs on power-up.

	 */

	intel_pmu_lbr_reset();



	if (!cpu_has_ht_siblings())

		return;



	for_each_cpu(i, topology_thread_cpumask(cpu)) {

		struct intel_percore *pc = per_cpu(cpu_hw_events, i).per_core;
@@ -1233,12 +1245,6 @@ static void intel_pmu_cpu_starting(int cpu) 


	cpuc->per_core->core_id = core_id;

	cpuc->per_core->refcnt++;



	init_debug_store_on_cpu(cpu);

	/*

	 * Deal with CPUs that don't clear their LBRs on power-up.

	 */

	intel_pmu_lbr_reset();

}



static void intel_pmu_cpu_dying(int cpu)