Commit 68b7cf5d authored by Sherry Sun's avatar Sherry Sun Committed by Shawn Guo
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arm64: dts: imx8mp: add ddr controller node to support EDAC on imx8mp 



i.MX8MP use synopsys V3.70a ddr controller IP, so add edac support
for i.MX8MP based on "snps,ddrc-3.80a" synopsys edac driver.

Signed-off-by: default avatarSherry Sun <sherry.sun@nxp.com>
Acked-by: default avatarKrzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 21a14c68

arch/arm64/boot/dts/freescale/imx8mp.dtsi

+6 −0
Original line number Diff line number Diff line
@@ -1009,6 +1009,12 @@ 
			interrupt-parent = <&gic>;

		};



		edacmc: memory-controller@3d400000 {

			compatible = "snps,ddrc-3.80a";

			reg = <0x3d400000 0x400000>;

			interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;

		};



		ddr-pmu@3d800000 {

			compatible = "fsl,imx8mp-ddr-pmu", "fsl,imx8m-ddr-pmu";

			reg = <0x3d800000 0x400000>;