Commit 6880ed28 authored by Alan Liu's avatar Alan Liu Committed by Alex Deucher
Browse files

drm/amd/display: Add HDMI_ACP_SEND register 



Define HDMI_ACP_SEND register shift/mask.

Signed-off-by: default avatarAlan Liu <HaoPing.Liu@amd.com>
Reviewed-by: default avatarHarry Wentland <harry.wentland@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent b0f4d663

drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h

+2 −0
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@@ -6070,6 +6070,8 @@ 
#define HDMI_VBI_PACKET_CONTROL__HDMI_ISRC_SEND__SHIFT 0x8

#define HDMI_VBI_PACKET_CONTROL__HDMI_ISRC_CONT_MASK 0x200

#define HDMI_VBI_PACKET_CONTROL__HDMI_ISRC_CONT__SHIFT 0x9

#define HDMI_VBI_PACKET_CONTROL__HDMI_ACP_SEND_MASK 0x1000

#define HDMI_VBI_PACKET_CONTROL__HDMI_ACP_SEND__SHIFT 0xc

#define HDMI_VBI_PACKET_CONTROL__HDMI_ISRC_LINE_MASK 0x3f0000

#define HDMI_VBI_PACKET_CONTROL__HDMI_ISRC_LINE__SHIFT 0x10

#define HDMI_INFOFRAME_CONTROL0__HDMI_AVI_INFO_SEND_MASK 0x1

drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h

+2 −0
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@@ -6058,6 +6058,8 @@ 
#define HDMI_VBI_PACKET_CONTROL__HDMI_ISRC_SEND__SHIFT 0x8

#define HDMI_VBI_PACKET_CONTROL__HDMI_ISRC_CONT_MASK 0x200

#define HDMI_VBI_PACKET_CONTROL__HDMI_ISRC_CONT__SHIFT 0x9

#define HDMI_VBI_PACKET_CONTROL__HDMI_ACP_SEND_MASK 0x1000

#define HDMI_VBI_PACKET_CONTROL__HDMI_ACP_SEND__SHIFT 0xc

#define HDMI_VBI_PACKET_CONTROL__HDMI_ISRC_LINE_MASK 0x3f0000

#define HDMI_VBI_PACKET_CONTROL__HDMI_ISRC_LINE__SHIFT 0x10

#define HDMI_INFOFRAME_CONTROL0__HDMI_AVI_INFO_SEND_MASK 0x1

drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h

+2 −0
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@@ -7142,6 +7142,8 @@ 
#define HDMI_VBI_PACKET_CONTROL__HDMI_ISRC_SEND__SHIFT 0x8

#define HDMI_VBI_PACKET_CONTROL__HDMI_ISRC_CONT_MASK 0x200

#define HDMI_VBI_PACKET_CONTROL__HDMI_ISRC_CONT__SHIFT 0x9

#define HDMI_VBI_PACKET_CONTROL__HDMI_ACP_SEND_MASK 0x1000

#define HDMI_VBI_PACKET_CONTROL__HDMI_ACP_SEND__SHIFT 0xc

#define HDMI_VBI_PACKET_CONTROL__HDMI_ISRC_LINE_MASK 0x3f0000

#define HDMI_VBI_PACKET_CONTROL__HDMI_ISRC_LINE__SHIFT 0x10

#define HDMI_INFOFRAME_CONTROL0__HDMI_AVI_INFO_SEND_MASK 0x1

drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h

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@@ -37285,12 +37285,14 @@ 
#define DIG0_HDMI_VBI_PACKET_CONTROL__HDMI_GC_CONT__SHIFT                                                     0x5

#define DIG0_HDMI_VBI_PACKET_CONTROL__HDMI_ISRC_SEND__SHIFT                                                   0x8

#define DIG0_HDMI_VBI_PACKET_CONTROL__HDMI_ISRC_CONT__SHIFT                                                   0x9

#define DIG0_HDMI_VBI_PACKET_CONTROL__HDMI_ACP_SEND__SHIFT                                                    0xc

#define DIG0_HDMI_VBI_PACKET_CONTROL__HDMI_ISRC_LINE__SHIFT                                                   0x10

#define DIG0_HDMI_VBI_PACKET_CONTROL__HDMI_NULL_SEND_MASK                                                     0x00000001L

#define DIG0_HDMI_VBI_PACKET_CONTROL__HDMI_GC_SEND_MASK                                                       0x00000010L

#define DIG0_HDMI_VBI_PACKET_CONTROL__HDMI_GC_CONT_MASK                                                       0x00000020L

#define DIG0_HDMI_VBI_PACKET_CONTROL__HDMI_ISRC_SEND_MASK                                                     0x00000100L

#define DIG0_HDMI_VBI_PACKET_CONTROL__HDMI_ISRC_CONT_MASK                                                     0x00000200L

#define DIG0_HDMI_VBI_PACKET_CONTROL__HDMI_ACP_SEND_MASK                                                      0x00001000L

#define DIG0_HDMI_VBI_PACKET_CONTROL__HDMI_ISRC_LINE_MASK                                                     0x003F0000L

//DIG0_HDMI_INFOFRAME_CONTROL0

#define DIG0_HDMI_INFOFRAME_CONTROL0__HDMI_AVI_INFO_SEND__SHIFT                                               0x0

drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_sh_mask.h

+2 −0
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@@ -5584,6 +5584,8 @@ 
#define HDMI_VBI_PACKET_CONTROL__HDMI_ISRC_SEND__SHIFT 0x8

#define HDMI_VBI_PACKET_CONTROL__HDMI_ISRC_CONT_MASK 0x200

#define HDMI_VBI_PACKET_CONTROL__HDMI_ISRC_CONT__SHIFT 0x9

#define HDMI_VBI_PACKET_CONTROL__HDMI_ACP_SEND_MASK 0x1000

#define HDMI_VBI_PACKET_CONTROL__HDMI_ACP_SEND__SHIFT 0xc

#define HDMI_VBI_PACKET_CONTROL__HDMI_ISRC_LINE_MASK 0x3f0000

#define HDMI_VBI_PACKET_CONTROL__HDMI_ISRC_LINE__SHIFT 0x10

#define HDMI_INFOFRAME_CONTROL0__HDMI_AVI_INFO_SEND_MASK 0x1