Commit 687825c4 authored by Bjorn Andersson's avatar Bjorn Andersson Committed by Rob Clark
Browse files

dt-bindings: msm/dp: Change reg definition 



reg was defined as one region covering the entire DP block, but the
memory map is actually split in 4 regions and obviously the size of
these regions differs between platforms.

Switch the reg to require that all four regions are specified instead.
It is expected that the implementation will handle existing DTBs, even
though the schema defines the new layout.

Reviewed-by: default avatarStephen Boyd <swboyd@chromium.org>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211001174400.981707-2-bjorn.andersson@linaro.org


Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: default avatarRob Clark <robdclark@chromium.org>
parent b6816441

Documentation/devicetree/bindings/display/msm/dp-controller.yaml

+11 −2
Original line number Diff line number Diff line
@@ -19,7 +19,12 @@ properties: 
      - qcom,sc7180-dp



  reg:

    maxItems: 1

    items:

      - description: ahb register block

      - description: aux register block

      - description: link register block

      - description: p0 register block

      - description: p1 register block



  interrupts:

    maxItems: 1
@@ -100,7 +105,11 @@ examples: 


    displayport-controller@ae90000 {

        compatible = "qcom,sc7180-dp";

        reg = <0xae90000 0x1400>;

        reg = <0xae90000 0x200>,

              <0xae90200 0x200>,

              <0xae90400 0xc00>,

              <0xae91000 0x400>,

              <0xae91400 0x400>;

        interrupt-parent = <&mdss>;

        interrupts = <12>;

        clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,