Commit 685967b3 authored by Joseph Greathouse's avatar Joseph Greathouse Committed by Alex Deucher
Browse files

drm/amdgpu: Put MODE register in wave debug info 



Add the MODE register into the per-wave debug information.
This register holds state such as FP rounding and denorm
modes, which exceptions are enabled, and active clamping
modes.

Signed-off-by: default avatarJoseph Greathouse <Joseph.Greathouse@amd.com>
Acked-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 14fb496a

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

+1 −0
Original line number Diff line number Diff line
@@ -4621,6 +4621,7 @@ static void gfx_v10_0_read_wave_data(struct amdgpu_device *adev, uint32_t simd, 
	dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_IB_STS2);

	dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_IB_DBG1);

	dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_M0);

	dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_MODE);

}



static void gfx_v10_0_read_wave_sgprs(struct amdgpu_device *adev, uint32_t simd,

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

+1 −0
Original line number Diff line number Diff line
@@ -3027,6 +3027,7 @@ static void gfx_v6_0_read_wave_data(struct amdgpu_device *adev, uint32_t simd, u 
	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TMA_HI);

	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_IB_DBG0);

	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_M0);

	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_MODE);

}



static void gfx_v6_0_read_wave_sgprs(struct amdgpu_device *adev, uint32_t simd,

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

+1 −0
Original line number Diff line number Diff line
@@ -4198,6 +4198,7 @@ static void gfx_v7_0_read_wave_data(struct amdgpu_device *adev, uint32_t simd, u 
	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TMA_HI);

	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_IB_DBG0);

	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_M0);

	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_MODE);

}



static void gfx_v7_0_read_wave_sgprs(struct amdgpu_device *adev, uint32_t simd,

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

+1 −0
Original line number Diff line number Diff line
@@ -5279,6 +5279,7 @@ static void gfx_v8_0_read_wave_data(struct amdgpu_device *adev, uint32_t simd, u 
	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TMA_HI);

	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_IB_DBG0);

	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_M0);

	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_MODE);

}



static void gfx_v8_0_read_wave_sgprs(struct amdgpu_device *adev, uint32_t simd,

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

+1 −0
Original line number Diff line number Diff line
@@ -2090,6 +2090,7 @@ static void gfx_v9_0_read_wave_data(struct amdgpu_device *adev, uint32_t simd, u 
	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_IB_STS);

	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_IB_DBG0);

	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_M0);

	dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_MODE);

}



static void gfx_v9_0_read_wave_sgprs(struct amdgpu_device *adev, uint32_t simd,