Commit 6847c4c2 authored by Fabio Estevam's avatar Fabio Estevam Committed by Stephen Boyd
Browse files

clk: imx7d: Add the OCOTP clock



Add the OCOTP so that this hardware block can be used.

Signed-off-by: default avatarFabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: default avatarStephen Boyd <sboyd@codeaurora.org>
parent 0c744ea4
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+1 −0
Original line number Diff line number Diff line
@@ -803,6 +803,7 @@ static void __init imx7d_clocks_init(struct device_node *ccm_node)
	clks[IMX7D_DRAM_PHYM_ROOT_CLK] = imx_clk_gate4("dram_phym_root_clk", "dram_phym_cg", base + 0x4130, 0);
	clks[IMX7D_DRAM_PHYM_ALT_ROOT_CLK] = imx_clk_gate4("dram_phym_alt_root_clk", "dram_phym_alt_post_div", base + 0x4130, 0);
	clks[IMX7D_DRAM_ALT_ROOT_CLK] = imx_clk_gate4("dram_alt_root_clk", "dram_alt_post_div", base + 0x4130, 0);
	clks[IMX7D_OCOTP_CLK] = imx_clk_gate4("ocotp_clk", "ipg_root_clk", base + 0x4230, 0);
	clks[IMX7D_USB_HSIC_ROOT_CLK] = imx_clk_gate4("usb_hsic_root_clk", "usb_hsic_post_div", base + 0x4420, 0);
	clks[IMX7D_SDMA_CORE_CLK] = imx_clk_gate4("sdma_root_clk", "ahb_root_clk", base + 0x4480, 0);
	clks[IMX7D_PCIE_CTRL_ROOT_CLK] = imx_clk_gate4("pcie_ctrl_root_clk", "pcie_ctrl_post_div", base + 0x4600, 0);
+2 −1
Original line number Diff line number Diff line
@@ -449,5 +449,6 @@
#define IMX7D_ADC_ROOT_CLK		436
#define IMX7D_CLK_ARM			437
#define IMX7D_CKIL			438
#define IMX7D_CLK_END			439
#define IMX7D_OCOTP_CLK			439
#define IMX7D_CLK_END			440
#endif /* __DT_BINDINGS_CLOCK_IMX7D_H */