Commit 680602d6 authored by Kenneth Feng's avatar Kenneth Feng Committed by Alex Deucher
Browse files

drm/amd/pm: enable DCS 



Enable DCS

V1: Enable Async DCS.
V2: Add the ppfeaturemask bit to enable from the modprobe parameter.
V3:
1. add the flag to skip APU support.
2. remove the hunk for workload selection since
it doesn't impact the function.

Signed-off-by: default avatarKenneth Feng <kenneth.feng@amd.com>
Acked-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent e83db774

drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c

+6 −2
Original line number Diff line number Diff line
@@ -132,8 +132,12 @@ uint amdgpu_pg_mask = 0xffffffff; 
uint amdgpu_sdma_phase_quantum = 32;

char *amdgpu_disable_cu = NULL;

char *amdgpu_virtual_display = NULL;

/* OverDrive(bit 14) disabled by default*/

uint amdgpu_pp_feature_mask = 0xffffbfff;



/*

 * OverDrive(bit 14) disabled by default

 * GFX DCS(bit 19) disabled by default

 */

uint amdgpu_pp_feature_mask = 0xfff7bfff;

uint amdgpu_force_long_training;

int amdgpu_job_hang_limit;

int amdgpu_lbpw = -1;

drivers/gpu/drm/amd/include/amd_shared.h

+1 −0
Original line number Diff line number Diff line
@@ -213,6 +213,7 @@ enum PP_FEATURE_MASK { 
	PP_ACG_MASK = 0x10000,

	PP_STUTTER_MODE = 0x20000,

	PP_AVFS_MASK = 0x40000,

	PP_GFX_DCS_MASK = 0x80000,

};



enum DC_FEATURE_MASK {

drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c

+5 −0
Original line number Diff line number Diff line
@@ -261,6 +261,11 @@ sienna_cichlid_get_allowed_feature_mask(struct smu_context *smu, 
		*(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_GFX_GPO_BIT);

	}



	if ((adev->pm.pp_feature & PP_GFX_DCS_MASK) &&

	    (adev->asic_type > CHIP_SIENNA_CICHLID) &&

	    !(adev->flags & AMD_IS_APU))

		*(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_GFX_DCS_BIT);



	if (adev->pm.pp_feature & PP_MCLK_DPM_MASK)

		*(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_UCLK_BIT)

					| FEATURE_MASK(FEATURE_MEM_VDDCI_SCALING_BIT)