Commit 67ebda8c authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-intel-next-fixes-2023-06-29' of... 

Merge tag 'drm-intel-next-fixes-2023-06-29' of git://anongit.freedesktop.org/drm/drm-intel

 into drm-next

- Allow DC states along with PW2 only for PWB functionality [adlp+] (Imre Deak)
- Fix SSC selection for MPLLA [mtl] (Radhakrishna Sripada)
- Use hw.adjusted mode when calculating io/fast wake times [psr] (Jouni Högander)
- Apply min softlimit correctly [guc/slpc] (Vinay Belgaumkar)
- Assign correct hdcp content type [hdcp] (Suraj Kandpal)
- Add missing forward declarations/includes to display power headers (Imre Deak)

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/ZJ1WpY+GF9NcsWXp@tursulin-desk
parents d011f0c3 5b782635

drivers/gpu/drm/i915/display/intel_cx0_phy.c

+2 −1
Original line number Diff line number Diff line
@@ -2435,7 +2435,8 @@ static void intel_program_port_clock_ctl(struct intel_encoder *encoder, 


	intel_de_rmw(i915, XELPDP_PORT_CLOCK_CTL(encoder->port),

		     XELPDP_LANE1_PHY_CLOCK_SELECT | XELPDP_FORWARD_CLOCK_UNGATE |

		     XELPDP_DDI_CLOCK_SELECT_MASK | XELPDP_SSC_ENABLE_PLLB, val);

		     XELPDP_DDI_CLOCK_SELECT_MASK | XELPDP_SSC_ENABLE_PLLA |

		     XELPDP_SSC_ENABLE_PLLB, val);

}



static u32 intel_cx0_get_powerdown_update(u8 lane_mask)

drivers/gpu/drm/i915/display/intel_display_power.h

+4 −0
Original line number Diff line number Diff line
@@ -6,6 +6,9 @@ 
#ifndef __INTEL_DISPLAY_POWER_H__

#define __INTEL_DISPLAY_POWER_H__



#include <linux/mutex.h>

#include <linux/workqueue.h>



#include "intel_wakeref.h"



enum aux_ch;
@@ -16,6 +19,7 @@ enum port; 
struct drm_i915_private;

struct i915_power_well;

struct intel_encoder;

struct seq_file;



/*

 * Keep the pipe, transcoder, port (DDI_LANES,DDI_IO,AUX) domain instances

drivers/gpu/drm/i915/display/intel_display_power_map.c

+8 −8
Original line number Diff line number Diff line
@@ -1252,10 +1252,18 @@ I915_DECL_PW_DOMAINS(xelpd_pwdoms_pw_a, 
	POWER_DOMAIN_INIT);



#define XELPD_DC_OFF_PORT_POWER_DOMAINS \

	POWER_DOMAIN_PORT_DDI_LANES_C, \

	POWER_DOMAIN_PORT_DDI_LANES_D, \

	POWER_DOMAIN_PORT_DDI_LANES_E, \

	POWER_DOMAIN_PORT_DDI_LANES_TC1, \

	POWER_DOMAIN_PORT_DDI_LANES_TC2, \

	POWER_DOMAIN_PORT_DDI_LANES_TC3, \

	POWER_DOMAIN_PORT_DDI_LANES_TC4, \

	POWER_DOMAIN_VGA, \

	POWER_DOMAIN_AUDIO_PLAYBACK, \

	POWER_DOMAIN_AUX_IO_C, \

	POWER_DOMAIN_AUX_IO_D, \

	POWER_DOMAIN_AUX_IO_E, \

	POWER_DOMAIN_AUX_C, \

	POWER_DOMAIN_AUX_D, \

	POWER_DOMAIN_AUX_E, \
@@ -1272,14 +1280,6 @@ I915_DECL_PW_DOMAINS(xelpd_pwdoms_pw_a, 
	XELPD_PW_B_POWER_DOMAINS, \

	XELPD_PW_C_POWER_DOMAINS, \

	XELPD_PW_D_POWER_DOMAINS, \

	POWER_DOMAIN_PORT_DDI_LANES_C, \

	POWER_DOMAIN_PORT_DDI_LANES_D, \

	POWER_DOMAIN_PORT_DDI_LANES_E, \

	POWER_DOMAIN_VGA, \

	POWER_DOMAIN_AUDIO_PLAYBACK, \

	POWER_DOMAIN_AUX_IO_C, \

	POWER_DOMAIN_AUX_IO_D, \

	POWER_DOMAIN_AUX_IO_E, \

	XELPD_DC_OFF_PORT_POWER_DOMAINS



I915_DECL_PW_DOMAINS(xelpd_pwdoms_pw_2,

drivers/gpu/drm/i915/display/intel_display_power_well.h

+2 −0
Original line number Diff line number Diff line
@@ -12,6 +12,8 @@ 


struct drm_i915_private;

struct i915_power_well;

struct i915_power_well_ops;

struct intel_encoder;



#define for_each_power_well(__dev_priv, __power_well)				\

	for ((__power_well) = (__dev_priv)->display.power.domains.power_wells;	\

drivers/gpu/drm/i915/display/intel_hdcp.c

+1 −1
Original line number Diff line number Diff line
@@ -2358,7 +2358,7 @@ int intel_hdcp_enable(struct intel_atomic_state *state, 
	mutex_lock(&dig_port->hdcp_mutex);

	drm_WARN_ON(&i915->drm,

		    hdcp->value == DRM_MODE_CONTENT_PROTECTION_ENABLED);

	hdcp->content_type = (u8)conn_state->content_type;

	hdcp->content_type = (u8)conn_state->hdcp_content_type;



	if (intel_crtc_has_type(pipe_config, INTEL_OUTPUT_DP_MST)) {

		hdcp->cpu_transcoder = pipe_config->mst_master_transcoder;