Commit 67ccd527 authored by Paolo Bonzini's avatar Paolo Bonzini
Browse files

Merge tag 'kvm-ppc-next-5.12-1' of...

Merge tag 'kvm-ppc-next-5.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc into HEAD

PPC KVM update for 5.12

- Support for second data watchpoint on POWER10, from Ravi Bangoria
- Remove some complex workarounds for buggy early versions of POWER9
- Guest entry/exit fixes from Nick Piggin and Fabiano Rosas
parents d8d0da4e 72476aaa
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+12 −0
Original line number Diff line number Diff line
@@ -2276,6 +2276,8 @@ registers, find a list below:
  PPC     KVM_REG_PPC_PSSCR               64
  PPC     KVM_REG_PPC_DEC_EXPIRY          64
  PPC     KVM_REG_PPC_PTCR                64
  PPC     KVM_REG_PPC_DAWR1               64
  PPC     KVM_REG_PPC_DAWRX1              64
  PPC     KVM_REG_PPC_TM_GPR0             64
  ...
  PPC     KVM_REG_PPC_TM_GPR31            64
@@ -6213,6 +6215,16 @@ the bus lock vm exit can be preempted by a higher priority VM exit, the exit
notifications to userspace can be KVM_EXIT_BUS_LOCK or other reasons.
KVM_RUN_BUS_LOCK flag is used to distinguish between them.

7.22 KVM_CAP_PPC_DAWR1
----------------------

:Architectures: ppc
:Parameters: none
:Returns: 0 on success, -EINVAL when CPU doesn't support 2nd DAWR

This capability can be used to check / enable 2nd DAWR feature provided
by POWER10 processor.

8. Other capabilities.
======================

+22 −3
Original line number Diff line number Diff line
@@ -535,9 +535,12 @@ struct h_cpu_char_result {
	u64 behaviour;
};

/* Register state for entering a nested guest with H_ENTER_NESTED */
/*
 * Register state for entering a nested guest with H_ENTER_NESTED.
 * New member must be added at the end.
 */
struct hv_guest_state {
	u64 version;		/* version of this structure layout */
	u64 version;		/* version of this structure layout, must be first */
	u32 lpid;
	u32 vcpu_token;
	/* These registers are hypervisor privileged (at least for writing) */
@@ -566,10 +569,26 @@ struct hv_guest_state {
	u64 pidr;
	u64 cfar;
	u64 ppr;
	/* Version 1 ends here */
	u64 dawr1;
	u64 dawrx1;
	/* Version 2 ends here */
};

/* Latest version of hv_guest_state structure */
#define HV_GUEST_STATE_VERSION	1
#define HV_GUEST_STATE_VERSION	2

static inline int hv_guest_state_size(unsigned int version)
{
	switch (version) {
	case 1:
		return offsetofend(struct hv_guest_state, ppr);
	case 2:
		return offsetofend(struct hv_guest_state, dawrx1);
	default:
		return -1;
	}
}

/*
 * From the document "H_GetPerformanceCounterInfo Interface" v1.07
+0 −11
Original line number Diff line number Diff line
@@ -74,16 +74,6 @@ struct kvm_split_mode {
	u8		do_nap;
	u8		napped[MAX_SMT_THREADS];
	struct kvmppc_vcore *vc[MAX_SUBCORES];
	/* Bits for changing lpcr on P9 */
	unsigned long	lpcr_req;
	unsigned long	lpidr_req;
	unsigned long	host_lpcr;
	u32		do_set;
	u32		do_restore;
	union {
		u32	allphases;
		u8	phase[4];
	} lpcr_sync;
};

/*
@@ -110,7 +100,6 @@ struct kvmppc_host_state {
	u8 hwthread_state;
	u8 host_ipi;
	u8 ptid;		/* thread number within subcore when split */
	u8 tid;			/* thread number within whole core */
	u8 fake_suspend;
	struct kvm_vcpu *kvm_vcpu;
	struct kvmppc_vcore *kvm_vcore;
+5 −2
Original line number Diff line number Diff line
@@ -306,6 +306,7 @@ struct kvm_arch {
	u8 svm_enabled;
	bool threads_indep;
	bool nested_enable;
	bool dawr1_enabled;
	pgd_t *pgtable;
	u64 process_table;
	struct dentry *debugfs_dir;
@@ -583,8 +584,10 @@ struct kvm_vcpu_arch {
	u32 ctrl;
	u32 dabrx;
	ulong dabr;
	ulong dawr;
	ulong dawrx;
	ulong dawr0;
	ulong dawrx0;
	ulong dawr1;
	ulong dawrx1;
	ulong ciabr;
	ulong cfar;
	ulong ppr;
+2 −0
Original line number Diff line number Diff line
@@ -314,6 +314,8 @@ struct kvmppc_ops {
			      int size);
	int (*enable_svm)(struct kvm *kvm);
	int (*svm_off)(struct kvm *kvm);
	int (*enable_dawr1)(struct kvm *kvm);
	bool (*hash_v3_possible)(void);
};

extern struct kvmppc_ops *kvmppc_hv_ops;
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