Commit 67b5655b authored by Vinay Belgaumkar's avatar Vinay Belgaumkar Committed by Rodrigo Vivi
Browse files

drm/i915/mtl: Enable Idle Messaging for GSC CS 



By defaut idle messaging is disabled for GSC CS so to unblock RC6
entry on media tile idle messaging need to be enabled.

v2:
 - Fix review comments (Vinay)
 - Set GSC idle hysteresis as per spec (Badal)
v3:
 - Fix review comments (Rodrigo)

Bspec: 71496

Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: default avatarVinay Belgaumkar <vinay.belgaumkar@intel.com>
Signed-off-by: default avatarBadal Nilawar <badal.nilawar@intel.com>
Reviewed-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221118183354.1047829-1-badal.nilawar@intel.com
parent 71feb6f9

drivers/gpu/drm/i915/gt/intel_engine_pm.c

+18 −0
Original line number Diff line number Diff line
@@ -15,6 +15,22 @@ 
#include "intel_rc6.h"

#include "intel_ring.h"

#include "shmem_utils.h"

#include "intel_gt_regs.h"



static void intel_gsc_idle_msg_enable(struct intel_engine_cs *engine)

{

	struct drm_i915_private *i915 = engine->i915;



	if (IS_METEORLAKE(i915) && engine->id == GSC0) {

		intel_uncore_write(engine->gt->uncore,

				   RC_PSMI_CTRL_GSCCS,

				   _MASKED_BIT_DISABLE(IDLE_MSG_DISABLE));

		/* hysteresis 0xA=5us as recommended in spec*/

		intel_uncore_write(engine->gt->uncore,

				   PWRCTX_MAXCNT_GSCCS,

				   0xA);

	}

}



static void dbg_poison_ce(struct intel_context *ce)

{
@@ -275,6 +291,8 @@ void intel_engine_init__pm(struct intel_engine_cs *engine) 


	intel_wakeref_init(&engine->wakeref, rpm, &wf_ops);

	intel_engine_init_heartbeat(engine);



	intel_gsc_idle_msg_enable(engine);

}



/**

drivers/gpu/drm/i915/gt/intel_gt_regs.h

+4 −0
Original line number Diff line number Diff line
@@ -916,6 +916,10 @@ 
#define  MSG_IDLE_FW_MASK	REG_GENMASK(13, 9)

#define  MSG_IDLE_FW_SHIFT	9



#define	RC_PSMI_CTRL_GSCCS	_MMIO(0x11a050)

#define	  IDLE_MSG_DISABLE	REG_BIT(0)

#define	PWRCTX_MAXCNT_GSCCS	_MMIO(0x11a054)



#define FORCEWAKE_MEDIA_GEN9			_MMIO(0xa270)

#define FORCEWAKE_RENDER_GEN9			_MMIO(0xa278)