Unverified Commit 6735988b authored by Mark Brown's avatar Mark Brown
Browse files

ASoC: Add regmap_field helpers for simple bit operations 

Merge series from Li Chen <lchen.firstlove@zohomail.com>

This series proposes to add simple bit operations for setting, clearing
and testing specific bits with regmap_field and uses them in one of the
sunxi drivers.
parents bf29a87c b2366240

drivers/base/regmap/regmap.c

+22 −0
Original line number Diff line number Diff line
@@ -2220,6 +2220,28 @@ int regmap_field_update_bits_base(struct regmap_field *field, 
}

EXPORT_SYMBOL_GPL(regmap_field_update_bits_base);



/**

 * regmap_field_test_bits() - Check if all specified bits are set in a

 *                            register field.

 *

 * @field: Register field to operate on

 * @bits: Bits to test

 *

 * Returns -1 if the underlying regmap_field_read() fails, 0 if at least one of the

 * tested bits is not set and 1 if all tested bits are set.

 */

int regmap_field_test_bits(struct regmap_field *field, unsigned int bits)

{

	unsigned int val, ret;



	ret = regmap_field_read(field, &val);

	if (ret)

		return ret;



	return (val & bits) == bits;

}

EXPORT_SYMBOL_GPL(regmap_field_test_bits);



/**

 * regmap_fields_update_bits_base() - Perform a read/modify/write cycle a

 *                                    register field with port ID

include/linux/regmap.h

+37 −0
Original line number Diff line number Diff line
@@ -1336,6 +1336,22 @@ static inline int regmap_field_update_bits(struct regmap_field *field, 
					     NULL, false, false);

}



static inline int regmap_field_set_bits(struct regmap_field *field,

					unsigned int bits)

{

	return regmap_field_update_bits_base(field, bits, bits, NULL, false,

					     false);

}



static inline int regmap_field_clear_bits(struct regmap_field *field,

					  unsigned int bits)

{

	return regmap_field_update_bits_base(field, bits, 0, NULL, false,

					     false);

}



int regmap_field_test_bits(struct regmap_field *field, unsigned int bits);



static inline int

regmap_field_force_update_bits(struct regmap_field *field,

			       unsigned int mask, unsigned int val)
@@ -1769,6 +1785,27 @@ regmap_field_force_update_bits(struct regmap_field *field, 
	return -EINVAL;

}



static inline int regmap_field_set_bits(struct regmap_field *field,

					unsigned int bits)

{

	WARN_ONCE(1, "regmap API is disabled");

	return -EINVAL;

}



static inline int regmap_field_clear_bits(struct regmap_field *field,

					  unsigned int bits)

{

	WARN_ONCE(1, "regmap API is disabled");

	return -EINVAL;

}



static inline int regmap_field_test_bits(struct regmap_field *field,

					 unsigned int bits)

{

	WARN_ONCE(1, "regmap API is disabled");

	return -EINVAL;

}



static inline int regmap_fields_write(struct regmap_field *field,

				      unsigned int id, unsigned int val)

{

sound/soc/sunxi/sun4i-codec.c

+30 −48
Original line number Diff line number Diff line
@@ -250,37 +250,33 @@ struct sun4i_codec { 
static void sun4i_codec_start_playback(struct sun4i_codec *scodec)

{

	/* Flush TX FIFO */

	regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,

			   BIT(SUN4I_CODEC_DAC_FIFOC_FIFO_FLUSH),

	regmap_set_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,

			BIT(SUN4I_CODEC_DAC_FIFOC_FIFO_FLUSH));



	/* Enable DAC DRQ */

	regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,

			   BIT(SUN4I_CODEC_DAC_FIFOC_DAC_DRQ_EN),

	regmap_set_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,

			BIT(SUN4I_CODEC_DAC_FIFOC_DAC_DRQ_EN));

}



static void sun4i_codec_stop_playback(struct sun4i_codec *scodec)

{

	/* Disable DAC DRQ */

	regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,

			   BIT(SUN4I_CODEC_DAC_FIFOC_DAC_DRQ_EN),

			   0);

	regmap_clear_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,

			  BIT(SUN4I_CODEC_DAC_FIFOC_DAC_DRQ_EN));

}



static void sun4i_codec_start_capture(struct sun4i_codec *scodec)

{

	/* Enable ADC DRQ */

	regmap_field_update_bits(scodec->reg_adc_fifoc,

				 BIT(SUN4I_CODEC_ADC_FIFOC_ADC_DRQ_EN),

	regmap_field_set_bits(scodec->reg_adc_fifoc,

			      BIT(SUN4I_CODEC_ADC_FIFOC_ADC_DRQ_EN));

}



static void sun4i_codec_stop_capture(struct sun4i_codec *scodec)

{

	/* Disable ADC DRQ */

	regmap_field_update_bits(scodec->reg_adc_fifoc,

				 BIT(SUN4I_CODEC_ADC_FIFOC_ADC_DRQ_EN), 0);

	regmap_field_clear_bits(scodec->reg_adc_fifoc,

				 BIT(SUN4I_CODEC_ADC_FIFOC_ADC_DRQ_EN));

}



static int sun4i_codec_trigger(struct snd_pcm_substream *substream, int cmd,
@@ -323,8 +319,7 @@ static int sun4i_codec_prepare_capture(struct snd_pcm_substream *substream, 




	/* Flush RX FIFO */

	regmap_field_update_bits(scodec->reg_adc_fifoc,

				 BIT(SUN4I_CODEC_ADC_FIFOC_FIFO_FLUSH),

	regmap_field_set_bits(scodec->reg_adc_fifoc,

				 BIT(SUN4I_CODEC_ADC_FIFOC_FIFO_FLUSH));
@@ -365,8 +360,7 @@ static int sun4i_codec_prepare_playback(struct snd_pcm_substream *substream, 
	u32 val;



	/* Flush the TX FIFO */

	regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,

			   BIT(SUN4I_CODEC_DAC_FIFOC_FIFO_FLUSH),

	regmap_set_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,

			   BIT(SUN4I_CODEC_DAC_FIFOC_FIFO_FLUSH));



	/* Set TX FIFO Empty Trigger Level */
@@ -386,9 +380,8 @@ static int sun4i_codec_prepare_playback(struct snd_pcm_substream *substream, 
			   val);



	/* Send zeros when we have an underrun */

	regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,

			   BIT(SUN4I_CODEC_DAC_FIFOC_SEND_LASAT),

			   0);

	regmap_clear_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,

			   BIT(SUN4I_CODEC_DAC_FIFOC_SEND_LASAT));



	return 0;

};
@@ -485,33 +478,27 @@ static int sun4i_codec_hw_params_capture(struct sun4i_codec *scodec, 


	/* Set the number of channels we want to use */

	if (params_channels(params) == 1)

		regmap_field_update_bits(scodec->reg_adc_fifoc,

					 BIT(SUN4I_CODEC_ADC_FIFOC_MONO_EN),

		regmap_field_set_bits(scodec->reg_adc_fifoc,

					 BIT(SUN4I_CODEC_ADC_FIFOC_MONO_EN));

	else

		regmap_field_update_bits(scodec->reg_adc_fifoc,

					 BIT(SUN4I_CODEC_ADC_FIFOC_MONO_EN),

					 0);

		regmap_field_clear_bits(scodec->reg_adc_fifoc,

					 BIT(SUN4I_CODEC_ADC_FIFOC_MONO_EN));



	/* Set the number of sample bits to either 16 or 24 bits */

	if (hw_param_interval(params, SNDRV_PCM_HW_PARAM_SAMPLE_BITS)->min == 32) {

		regmap_field_update_bits(scodec->reg_adc_fifoc,

				   BIT(SUN4I_CODEC_ADC_FIFOC_RX_SAMPLE_BITS),

		regmap_field_set_bits(scodec->reg_adc_fifoc,

				   BIT(SUN4I_CODEC_ADC_FIFOC_RX_SAMPLE_BITS));



		regmap_field_update_bits(scodec->reg_adc_fifoc,

				   BIT(SUN4I_CODEC_ADC_FIFOC_RX_FIFO_MODE),

				   0);

		regmap_field_clear_bits(scodec->reg_adc_fifoc,

				   BIT(SUN4I_CODEC_ADC_FIFOC_RX_FIFO_MODE));



		scodec->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;

	} else {

		regmap_field_update_bits(scodec->reg_adc_fifoc,

				   BIT(SUN4I_CODEC_ADC_FIFOC_RX_SAMPLE_BITS),

				   0);

		regmap_field_clear_bits(scodec->reg_adc_fifoc,

				   BIT(SUN4I_CODEC_ADC_FIFOC_RX_SAMPLE_BITS));



		/* Fill most significant bits with valid data MSB */

		regmap_field_update_bits(scodec->reg_adc_fifoc,

				   BIT(SUN4I_CODEC_ADC_FIFOC_RX_FIFO_MODE),

		regmap_field_set_bits(scodec->reg_adc_fifoc,

				   BIT(SUN4I_CODEC_ADC_FIFOC_RX_FIFO_MODE));



		scodec->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
@@ -543,24 +530,20 @@ static int sun4i_codec_hw_params_playback(struct sun4i_codec *scodec, 


	/* Set the number of sample bits to either 16 or 24 bits */

	if (hw_param_interval(params, SNDRV_PCM_HW_PARAM_SAMPLE_BITS)->min == 32) {

		regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,

				   BIT(SUN4I_CODEC_DAC_FIFOC_TX_SAMPLE_BITS),

		regmap_set_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,

				   BIT(SUN4I_CODEC_DAC_FIFOC_TX_SAMPLE_BITS));



		/* Set TX FIFO mode to padding the LSBs with 0 */

		regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,

				   BIT(SUN4I_CODEC_DAC_FIFOC_TX_FIFO_MODE),

				   0);

		regmap_clear_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,

				   BIT(SUN4I_CODEC_DAC_FIFOC_TX_FIFO_MODE));



		scodec->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;

	} else {

		regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,

				   BIT(SUN4I_CODEC_DAC_FIFOC_TX_SAMPLE_BITS),

				   0);

		regmap_clear_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,

				   BIT(SUN4I_CODEC_DAC_FIFOC_TX_SAMPLE_BITS));



		/* Set TX FIFO mode to repeat the MSB */

		regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,

				   BIT(SUN4I_CODEC_DAC_FIFOC_TX_FIFO_MODE),

		regmap_set_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,

				   BIT(SUN4I_CODEC_DAC_FIFOC_TX_FIFO_MODE));



		scodec->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
@@ -624,8 +607,7 @@ static int sun4i_codec_startup(struct snd_pcm_substream *substream, 
	 * Stop issuing DRQ when we have room for less than 16 samples

	 * in our TX FIFO

	 */

	regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,

			   3 << SUN4I_CODEC_DAC_FIFOC_DRQ_CLR_CNT,

	regmap_set_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,

			   3 << SUN4I_CODEC_DAC_FIFOC_DRQ_CLR_CNT);



	return clk_prepare_enable(scodec->clk_module);