Commit 67260cc5 authored by Luoyouming's avatar Luoyouming Committed by Zheng Zengkai
Browse files

Revert "RDMA/hns: Fix the problem of sge nums" 

driver inclusion
category: cleanup
bugzilla: https://gitee.com/openeuler/kernel/issues/I5USIG



-----------------------------------------------------------

This reverts commit 34542349.

Fixes: 34542349 ("RDMA/hns: Fix the problem of sge nums")

Signed-off-by: default avatarLuoyouming <luoyouming@huawei.com>
Reviewed-by: default avatarYangyang Li <liyangyang20@huawei.com>
Reviewed-by: default avatarHaoyue Xu <xuhaoyue1@hisilicon.com>
Reviewed-by: default avatarYueHaibing <yuehaibing@huawei.com>
Signed-off-by: default avatarZheng Zengkai <zhengzengkai@huawei.com>
parent ad67bc57

drivers/infiniband/hw/hns/hns_roce_device.h

+0 −2
Original line number Diff line number Diff line
@@ -202,7 +202,6 @@ struct hns_roce_ucontext { 
	struct list_head	page_list;

	struct mutex		page_mutex;

	struct hns_user_mmap_entry *db_mmap_entry;

	u32                     config;

};



struct hns_roce_pd {
@@ -330,7 +329,6 @@ struct hns_roce_wq { 
	spinlock_t	lock;

	u32		wqe_cnt;  /* WQE num */

	u32		max_gs;

	u32             ext_sge_cnt;

	u32		rsv_sge;

	u32		offset;

	u32		wqe_shift; /* WQE size */

drivers/infiniband/hw/hns/hns_roce_hw_v2.c

+11 −1
Original line number Diff line number Diff line
@@ -188,6 +188,14 @@ static void set_atomic_seg(const struct ib_send_wr *wr, 
	hr_reg_write(rc_sq_wqe, RC_SEND_WQE_SGE_NUM, valid_num_sge);

}



static unsigned int get_std_sge_num(struct hns_roce_qp *qp)

{

	if (qp->ibqp.qp_type == IB_QPT_GSI || qp->ibqp.qp_type == IB_QPT_UD)

		return 0;



	return HNS_ROCE_SGE_IN_WQE;

}



static int fill_ext_sge_inl_data(struct hns_roce_qp *qp,

				 const struct ib_send_wr *wr,

				 unsigned int *sge_idx, u32 msg_len)
@@ -195,12 +203,14 @@ static int fill_ext_sge_inl_data(struct hns_roce_qp *qp, 
	struct ib_device *ibdev = &(to_hr_dev(qp->ibqp.device))->ib_dev;

	unsigned int left_len_in_pg;

	unsigned int idx = *sge_idx;

	unsigned int std_sge_num;

	unsigned int i = 0;

	unsigned int len;

	void *addr;

	void *dseg;



	if (msg_len > qp->sq.ext_sge_cnt * HNS_ROCE_SGE_SIZE) {

	std_sge_num = get_std_sge_num(qp);

	if (msg_len > (qp->sq.max_gs - std_sge_num) * HNS_ROCE_SGE_SIZE) {

		ibdev_err(ibdev,

			  "no enough extended sge space for inline data.\n");

		return -EINVAL;

drivers/infiniband/hw/hns/hns_roce_main.c

+0 −16
Original line number Diff line number Diff line
@@ -358,7 +358,6 @@ static int hns_roce_alloc_ucontext(struct ib_ucontext *uctx, 
	struct hns_roce_ucontext *context = to_hr_ucontext(uctx);

	struct hns_roce_ib_alloc_ucontext_resp resp = {};

	struct hns_roce_dev *hr_dev = to_hr_dev(uctx->device);

	struct hns_roce_ib_alloc_ucontext ucmd = {};



	if (!hr_dev->active)

		return -EAGAIN;
@@ -366,21 +365,6 @@ static int hns_roce_alloc_ucontext(struct ib_ucontext *uctx, 
	resp.qp_tab_size = hr_dev->caps.num_qps;

	resp.srq_tab_size = hr_dev->caps.num_srqs;



	if (udata->inlen == sizeof(struct hns_roce_ib_alloc_ucontext)) {

		ret = ib_copy_from_udata(&ucmd, udata,

					 min(udata->inlen, sizeof(ucmd)));

		if (ret)

			return ret;



		if (hr_dev->pci_dev->revision >= PCI_REVISION_ID_HIP09)

			context->config = ucmd.config & HNS_ROCE_UCONTEXT_EXSGE_CALC_MODE;



		if (context->config & HNS_ROCE_UCONTEXT_EXSGE_CALC_MODE) {

			resp.config = HNS_ROCE_UCONTEXT_EXSGE_CALC_MODE;

			resp.max_inline_data = hr_dev->caps.max_sq_inline;

		}

	}



	ret = hns_roce_uar_alloc(hr_dev, &context->uar);

	if (ret)

		goto error_fail_uar_alloc;

drivers/infiniband/hw/hns/hns_roce_qp.c

+24 −110
Original line number Diff line number Diff line
@@ -482,118 +482,38 @@ static int set_rq_size(struct hns_roce_dev *hr_dev, struct ib_qp_cap *cap, 
	return 0;

}



static u32 get_max_inline_data(struct hns_roce_dev *hr_dev,

			       struct ib_qp_cap *cap)

static u32 get_wqe_ext_sge_cnt(struct hns_roce_qp *qp)

{

	if (cap->max_inline_data) {

		cap->max_inline_data = roundup_pow_of_two(

					cap->max_inline_data);

		return min(cap->max_inline_data,

			   hr_dev->caps.max_sq_inline);

	}



	return cap->max_inline_data;

}



static void update_inline_data(struct hns_roce_qp *hr_qp,

			       struct ib_qp_cap *cap, u32 config)

{

	bool is_ud_or_gsi_type = (hr_qp->ibqp.qp_type == IB_QPT_GSI ||

				  hr_qp->ibqp.qp_type == IB_QPT_UD);

	u32 sge_num = hr_qp->sq.ext_sge_cnt;

	/* GSI/UD QP only has extended sge */

	if (qp->ibqp.qp_type == IB_QPT_GSI || qp->ibqp.qp_type == IB_QPT_UD)

		return qp->sq.max_gs;



	if (config & HNS_ROCE_UCONTEXT_EXSGE_CALC_MODE) {

		if (!is_ud_or_gsi_type)

			sge_num = max((u32)HNS_ROCE_SGE_IN_WQE, sge_num);

	if (qp->sq.max_gs > HNS_ROCE_SGE_IN_WQE)

		return qp->sq.max_gs - HNS_ROCE_SGE_IN_WQE;



		cap->max_inline_data = max(cap->max_inline_data,

					sge_num * HNS_ROCE_SGE_SIZE);

	}



	hr_qp->max_inline_data = cap->max_inline_data;

}



/**

 *  Calculated sge num according to attr's max_send_sge

 */

static u32 get_sge_num_from_max_send_sge(bool is_ud_or_gsi_type,

					 u32 max_send_sge)

{

	unsigned int std_sge_num;

	unsigned int min_sge;



	std_sge_num = is_ud_or_gsi_type ? 0 : HNS_ROCE_SGE_IN_WQE;

	min_sge = is_ud_or_gsi_type ? 1 : 0;

	return max_send_sge > std_sge_num ? max(min_sge,

			      (max_send_sge - std_sge_num)) : min_sge;

}



/**

 *  Calculated sge num according to attr's max_inline_data

 */

static unsigned int get_sge_num_from_max_inl_data(bool is_ud_or_gsi_type,

						  u32 max_inline_data)

{

	unsigned int inline_sge = 0;



	inline_sge = roundup_pow_of_two(max_inline_data) / HNS_ROCE_SGE_SIZE;



	/*

	 * if max_inline_data less than

	 * HNS_ROCE_SGE_IN_WQE * HNS_ROCE_SGE_SIZE,

	 * In addition to ud's mode, no need to extend sge.

	 */

	if ((!is_ud_or_gsi_type) && (inline_sge <= HNS_ROCE_SGE_IN_WQE))

		inline_sge = 0;



	return inline_sge;

	return 0;

}



static void set_ext_sge_param(struct hns_roce_dev *hr_dev, u32 sq_wqe_cnt,

			      struct hns_roce_qp *hr_qp, struct ib_qp_cap *cap,

			      u32 config)

			      struct hns_roce_qp *hr_qp, struct ib_qp_cap *cap)

{

	bool is_ud_or_gsi_type = (hr_qp->ibqp.qp_type == IB_QPT_GSI ||

				  hr_qp->ibqp.qp_type == IB_QPT_UD);

	unsigned int std_sge_num;

	u32 inline_ext_sge = 0;

	u32 ext_wqe_sge_cnt;

	u32 total_sge_cnt;



	cap->max_inline_data = get_max_inline_data(hr_dev, cap);

	u32 wqe_sge_cnt;



	hr_qp->sge.sge_shift = HNS_ROCE_SGE_SHIFT;

	std_sge_num = is_ud_or_gsi_type ? 0 : HNS_ROCE_SGE_IN_WQE;

	ext_wqe_sge_cnt = get_sge_num_from_max_send_sge(is_ud_or_gsi_type,

							cap->max_send_sge);



	if (config & HNS_ROCE_UCONTEXT_EXSGE_CALC_MODE) {

		inline_ext_sge = max(ext_wqe_sge_cnt,

				 get_sge_num_from_max_inl_data(

				 is_ud_or_gsi_type, cap->max_inline_data));

		hr_qp->sq.ext_sge_cnt = !!(inline_ext_sge) ?

					roundup_pow_of_two(inline_ext_sge) : 0;



		hr_qp->sq.max_gs = max(1U, (hr_qp->sq.ext_sge_cnt + std_sge_num));

		hr_qp->sq.max_gs = min(hr_qp->sq.max_gs, hr_dev->caps.max_sq_sg);



		ext_wqe_sge_cnt = hr_qp->sq.ext_sge_cnt;

	} else {

	hr_qp->sq.max_gs = max(1U, cap->max_send_sge);

		hr_qp->sq.max_gs = min(hr_qp->sq.max_gs, hr_dev->caps.max_sq_sg);

		hr_qp->sq.ext_sge_cnt = hr_qp->sq.max_gs;

	}



	wqe_sge_cnt = get_wqe_ext_sge_cnt(hr_qp);



	/* If the number of extended sge is not zero, they MUST use the

	 * space of HNS_HW_PAGE_SIZE at least.

	 */

	if (ext_wqe_sge_cnt) {

		total_sge_cnt = roundup_pow_of_two(sq_wqe_cnt * ext_wqe_sge_cnt);

	if (wqe_sge_cnt) {

		total_sge_cnt = roundup_pow_of_two(sq_wqe_cnt * wqe_sge_cnt);

		hr_qp->sge.sge_cnt = max(total_sge_cnt,

				(u32)HNS_HW_PAGE_SIZE / HNS_ROCE_SGE_SIZE);

	}



	update_inline_data(hr_qp, cap, config);

}



static int check_sq_size_with_integrity(struct hns_roce_dev *hr_dev,
@@ -621,7 +541,7 @@ static int check_sq_size_with_integrity(struct hns_roce_dev *hr_dev, 


static int set_user_sq_size(struct hns_roce_dev *hr_dev,

			    struct ib_qp_cap *cap, struct hns_roce_qp *hr_qp,

			    struct hns_roce_ib_create_qp *ucmd, u32 config)

			    struct hns_roce_ib_create_qp *ucmd)

{

	struct ib_device *ibdev = &hr_dev->ib_dev;

	u32 cnt = 0;
@@ -638,11 +558,10 @@ static int set_user_sq_size(struct hns_roce_dev *hr_dev, 
		return ret;

	}



	set_ext_sge_param(hr_dev, cnt, hr_qp, cap, config);

	set_ext_sge_param(hr_dev, cnt, hr_qp, cap);



	hr_qp->sq.wqe_shift = ucmd->log_sq_stride;

	hr_qp->sq.wqe_cnt = cnt;

	cap->max_send_sge = hr_qp->sq.max_gs;



	return 0;

}
@@ -699,8 +618,7 @@ static int set_wqe_buf_attr(struct hns_roce_dev *hr_dev, 
}



static int set_kernel_sq_size(struct hns_roce_dev *hr_dev,

			      struct ib_qp_cap *cap, struct hns_roce_qp *hr_qp,

			      u32 config)

			      struct ib_qp_cap *cap, struct hns_roce_qp *hr_qp)

{

	struct ib_device *ibdev = &hr_dev->ib_dev;

	u32 cnt;
@@ -721,7 +639,7 @@ static int set_kernel_sq_size(struct hns_roce_dev *hr_dev, 
	hr_qp->sq.wqe_shift = ilog2(hr_dev->caps.max_sq_desc_sz);

	hr_qp->sq.wqe_cnt = cnt;



	set_ext_sge_param(hr_dev, cnt, hr_qp, cap, config);

	set_ext_sge_param(hr_dev, cnt, hr_qp, cap);



	/* sync the parameters of kernel QP to user's configuration */

	cap->max_send_wr = cnt;
@@ -1073,12 +991,15 @@ static int set_qp_param(struct hns_roce_dev *hr_dev, struct hns_roce_qp *hr_qp, 
			struct hns_roce_ib_create_qp *ucmd)

{

	struct ib_device *ibdev = &hr_dev->ib_dev;

	struct hns_roce_ucontext *uctx;

	u32 config = 0;

	int ret;



	hr_qp->ibqp.qp_type = init_attr->qp_type;



	if (init_attr->cap.max_inline_data > hr_dev->caps.max_sq_inline)

		init_attr->cap.max_inline_data = hr_dev->caps.max_sq_inline;



	hr_qp->max_inline_data = init_attr->cap.max_inline_data;



	if (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR)

		hr_qp->sq_signal_bits = IB_SIGNAL_ALL_WR;

	else
@@ -1101,12 +1022,7 @@ static int set_qp_param(struct hns_roce_dev *hr_dev, struct hns_roce_qp *hr_qp, 
			return ret;

		}



		uctx = rdma_udata_to_drv_context(udata, struct hns_roce_ucontext,

						ibucontext);

		config = uctx->config;

		ret = set_user_sq_size(hr_dev, &init_attr->cap, hr_qp, ucmd,

					config);



		ret = set_user_sq_size(hr_dev, &init_attr->cap, hr_qp, ucmd);

		if (ret)

			ibdev_err(ibdev, "Failed to set user SQ size, ret = %d\n",

				  ret);
@@ -1122,9 +1038,7 @@ static int set_qp_param(struct hns_roce_dev *hr_dev, struct hns_roce_qp *hr_qp, 
			return -EINVAL;

		}



		if (hr_dev->pci_dev->revision >= PCI_REVISION_ID_HIP09)

			config = HNS_ROCE_UCONTEXT_EXSGE_CALC_MODE;

		ret = set_kernel_sq_size(hr_dev, &init_attr->cap, hr_qp, config);

		ret = set_kernel_sq_size(hr_dev, &init_attr->cap, hr_qp);

		if (ret)

			ibdev_err(ibdev, "Failed to set kernel SQ size, ret = %d\n",

				  ret);

include/uapi/rdma/hns-abi.h

+0 −11
Original line number Diff line number Diff line
@@ -85,21 +85,10 @@ struct hns_roce_ib_create_qp_resp { 
	__aligned_u64 dwqe_mmap_key;

};



enum {

	HNS_ROCE_UCONTEXT_EXSGE_CALC_MODE = 1 << 0,

};



struct hns_roce_ib_alloc_ucontext_resp {

	__u32	qp_tab_size;

	__u32	cqe_size;

	__u32   srq_tab_size;

	__u32	max_inline_data;

	__u32	config;

	__u32   reserved;

};



struct hns_roce_ib_alloc_ucontext {

	__u32 config;

	__u32   reserved;

};