dt-bindings: phy: convert phy-mtk-ufs.txt to YAML schema

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

# Copyright (c) 2020 MediaTek

%YAML 1.2

---

$id: http://devicetree.org/schemas/phy/mediatek,ufs-phy.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#

title: MediaTek Universal Flash Storage (UFS) M-PHY binding

maintainers:

  - Stanley Chu <stanley.chu@mediatek.com>

  - Chunfeng Yun <chunfeng.yun@mediatek.com>

description: |

  UFS M-PHY nodes are defined to describe on-chip UFS M-PHY hardware macro.

  Each UFS M-PHY node should have its own node.

  To bind UFS M-PHY with UFS host controller, the controller node should

  contain a phandle reference to UFS M-PHY node.

properties:

  $nodename:

    pattern: "^ufs-phy@[0-9a-f]+$"

  compatible:

    const: mediatek,mt8183-ufsphy

  reg:

    maxItems: 1

  clocks:

    items:

      - description: Unipro core control clock.

      - description: M-PHY core control clock.

  clock-names:

    items:

      - const: unipro

      - const: mp

  "#phy-cells":

    const: 0

required:

  - compatible

  - reg

  - "#phy-cells"

  - clocks

  - clock-names

additionalProperties: false

examples:

  - |

    #include <dt-bindings/clock/mt8183-clk.h>

    ufsphy: ufs-phy@11fa0000 {

        compatible = "mediatek,mt8183-ufsphy";

        reg = <0x11fa0000 0xc000>;

        clocks = <&infracfg CLK_INFRA_UNIPRO_SCK>,

                 <&infracfg CLK_INFRA_UFS_MP_SAP_BCLK>;

        clock-names = "unipro", "mp";

        #phy-cells = <0>;

    };

...

MediaTek Universal Flash Storage (UFS) M-PHY binding

--------------------------------------------------------

UFS M-PHY nodes are defined to describe on-chip UFS M-PHY hardware macro.

Each UFS M-PHY node should have its own node.

To bind UFS M-PHY with UFS host controller, the controller node should

contain a phandle reference to UFS M-PHY node.

Required properties for UFS M-PHY nodes:

- compatible         : Compatible list, contains the following controller:

                       "mediatek,mt8183-ufsphy" for ufs phy

                       persent on MT81xx chipsets.

- reg                : Address and length of the UFS M-PHY register set.

- #phy-cells         : This property shall be set to 0.

- clocks             : List of phandle and clock specifier pairs.

- clock-names        : List of clock input name strings sorted in the same

                       order as the clocks property. Following clocks are

                       mandatory.

                       "unipro": Unipro core control clock.

                       "mp": M-PHY core control clock.

Example:

	ufsphy: phy@11fa0000 {

		compatible = "mediatek,mt8183-ufsphy";

		reg = <0 0x11fa0000 0 0xc000>;

		#phy-cells = <0>;

		clocks = <&infracfg_ao INFRACFG_AO_UNIPRO_SCK_CG>,

			 <&infracfg_ao INFRACFG_AO_UFS_MP_SAP_BCLK_CG>;

		clock-names = "unipro", "mp";

	};

	ufshci@11270000 {

		...

		phys = <&ufsphy>;

	};