Commit 66ee379d authored by Tinghan Shen's avatar Tinghan Shen Committed by Lee Jones
Browse files

mfd: cros_ec: Add SCP Core-1 as a new CrOS EC MCU 



MT8195 System Companion Processors(SCP) is a dual-core RISC-V MCU.
Add a new CrOS feature ID to represent the SCP's 2nd core.

The 1st core is referred to as 'core 0', and the 2nd core is referred
to as 'core 1'.

Signed-off-by: default avatarTinghan Shen <tinghan.shen@mediatek.com>
Signed-off-by: default avatarLee Jones <lee.jones@linaro.org>
Link: https://lore.kernel.org/r/20220601112201.15510-16-tinghan.shen@mediatek.com
parent 738654be

drivers/mfd/cros_ec_dev.c

+5 −0
Original line number Diff line number Diff line
@@ -64,6 +64,11 @@ static const struct cros_feature_to_name cros_mcu_devices[] = { 
		.name	= CROS_EC_DEV_SCP_NAME,

		.desc	= "System Control Processor",

	},

	{

		.id	= EC_FEATURE_SCP_C1,

		.name	= CROS_EC_DEV_SCP_C1_NAME,

		.desc	= "System Control Processor 2nd Core",

	},

	{

		.id	= EC_FEATURE_TOUCHPAD,

		.name	= CROS_EC_DEV_TP_NAME,

include/linux/platform_data/cros_ec_commands.h

+2 −0
Original line number Diff line number Diff line
@@ -1300,6 +1300,8 @@ enum ec_feature_code { 
	 * mux.

	 */

	EC_FEATURE_TYPEC_MUX_REQUIRE_AP_ACK = 43,

	/* The MCU is a System Companion Processor (SCP) 2nd Core. */

	EC_FEATURE_SCP_C1 = 45,

};



#define EC_FEATURE_MASK_0(event_code) BIT(event_code % 32)

include/linux/platform_data/cros_ec_proto.h

+1 −0
Original line number Diff line number Diff line
@@ -19,6 +19,7 @@ 
#define CROS_EC_DEV_ISH_NAME	"cros_ish"

#define CROS_EC_DEV_PD_NAME	"cros_pd"

#define CROS_EC_DEV_SCP_NAME	"cros_scp"

#define CROS_EC_DEV_SCP_C1_NAME	"cros_scp_c1"

#define CROS_EC_DEV_TP_NAME	"cros_tp"



/*