Commit 66d141a1 authored by Kathiravan T's avatar Kathiravan T Committed by Bjorn Andersson
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arm64: dts: qcom: ipq5332: define UART1 



Add the definition for the UART1 found on IPQ5332 SoC.

Reviewed-by: default avatarBhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: default avatarKathiravan T <quic_kathirav@quicinc.com>
Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230519133844.23512-3-quic_kathirav@quicinc.com
parent b59cd290

arch/arm64/boot/dts/qcom/ipq5332.dtsi

+12 −0
Original line number Diff line number Diff line
@@ -225,6 +225,18 @@ 
			status = "disabled";

		};



		blsp1_uart1: serial@78b0000 {

			compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";

			reg = <0x078b0000 0x200>;

			interrupts = <GIC_SPI 291 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>,

				 <&gcc GCC_BLSP1_AHB_CLK>;

			clock-names = "core", "iface";

			dmas = <&blsp_dma 2>, <&blsp_dma 3>;

			dma-names = "tx", "rx";

			status = "disabled";

		};



		blsp1_spi0: spi@78b5000 {

			compatible = "qcom,spi-qup-v2.2.1";

			reg = <0x078b5000 0x600>;