Commit 66b32e3d authored by Jeremy Kerr's avatar Jeremy Kerr Committed by Alexandre Belloni
Browse files

i3c: dw: use bus mode rather than device reg for conditional tCAS setting 



In the clock setup path, we set the hardware DEV_CTRL_I2C_SLAVE_PRESENT
bit on a shared mode bus, then read-back this bit for the conditional
tCAS set.

Instead, just use the bus->mode setting for the conditional test.

While we're at it, add a little comment about why the conditional is
there.

Signed-off-by: default avatarJeremy Kerr <jk@codeconstruct.com.au>
Link: https://lore.kernel.org/r/92a933566f7846708a00ad7f5a16ee8e6ed32d0e.1680156630.git.jk@codeconstruct.com.au


Signed-off-by: default avatarAlexandre Belloni <alexandre.belloni@bootlin.com>
parent 67df5ce9

drivers/i3c/master/dw-i3c-master.c

+5 −1
Original line number Diff line number Diff line
@@ -538,7 +538,11 @@ static int dw_i3c_clk_cfg(struct dw_i3c_master *master) 
	scl_timing = SCL_I3C_TIMING_HCNT(hcnt) | SCL_I3C_TIMING_LCNT(lcnt);

	writel(scl_timing, master->regs + SCL_I3C_PP_TIMING);



	if (!(readl(master->regs + DEVICE_CTRL) & DEV_CTRL_I2C_SLAVE_PRESENT))

	/*

	 * In pure i3c mode, MST_FREE represents tCAS. In shared mode, this

	 * will be set up by dw_i2c_clk_cfg as tLOW.

	 */

	if (master->base.bus.mode == I3C_BUS_MODE_PURE)

		writel(BUS_I3C_MST_FREE(lcnt), master->regs + BUS_FREE_TIMING);



	lcnt = max_t(u8,