Commit 66765836 authored by Yevgeny Kliteynik's avatar Yevgeny Kliteynik Committed by Saeed Mahameed
Browse files

net/mlx5: Manage ICM of type modify-header pattern 



Added support for managing new type of ICM for devices that
support sw_owner_v2.

Signed-off-by: default avatarErez Shitrit <erezsh@mellanox.com>
Signed-off-by: default avatarYevgeny Kliteynik <kliteyn@nvidia.com>
Signed-off-by: default avatarLeon Romanovsky <leonro@nvidia.com>
Acked-by: default avatarSaeed Mahameed <saeedm@nvidia.com>
Signed-off-by: default avatarSaeed Mahameed <saeedm@nvidia.com>
parent 795e10b4

drivers/net/ethernet/mellanox/mlx5/core/lib/dm.c

+42 −0
Original line number Diff line number Diff line
@@ -12,13 +12,16 @@ struct mlx5_dm { 
	spinlock_t lock;

	unsigned long *steering_sw_icm_alloc_blocks;

	unsigned long *header_modify_sw_icm_alloc_blocks;

	unsigned long *header_modify_pattern_sw_icm_alloc_blocks;

};



struct mlx5_dm *mlx5_dm_create(struct mlx5_core_dev *dev)

{

	u64 header_modify_pattern_icm_blocks = 0;

	u64 header_modify_icm_blocks = 0;

	u64 steering_icm_blocks = 0;

	struct mlx5_dm *dm;

	bool support_v2;



	if (!(MLX5_CAP_GEN_64(dev, general_obj_types) & MLX5_GENERAL_OBJ_TYPES_CAP_SW_ICM))

		return NULL;
@@ -53,8 +56,27 @@ struct mlx5_dm *mlx5_dm_create(struct mlx5_core_dev *dev) 
			goto err_modify_hdr;

	}



	support_v2 = MLX5_CAP_FLOWTABLE_NIC_RX(dev, sw_owner_v2) &&

		     MLX5_CAP_FLOWTABLE_NIC_TX(dev, sw_owner_v2) &&

		     MLX5_CAP64_DEV_MEM(dev, header_modify_pattern_sw_icm_start_address);



	if (support_v2) {

		header_modify_pattern_icm_blocks =

			BIT(MLX5_CAP_DEV_MEM(dev, log_header_modify_pattern_sw_icm_size) -

			    MLX5_LOG_SW_ICM_BLOCK_SIZE(dev));



		dm->header_modify_pattern_sw_icm_alloc_blocks =

			kcalloc(BITS_TO_LONGS(header_modify_pattern_icm_blocks),

				sizeof(unsigned long), GFP_KERNEL);

		if (!dm->header_modify_pattern_sw_icm_alloc_blocks)

			goto err_pattern;

	}



	return dm;



err_pattern:

	kfree(dm->header_modify_sw_icm_alloc_blocks);



err_modify_hdr:

	kfree(dm->steering_sw_icm_alloc_blocks);
@@ -86,6 +108,14 @@ void mlx5_dm_cleanup(struct mlx5_core_dev *dev) 
		kfree(dm->header_modify_sw_icm_alloc_blocks);

	}



	if (dm->header_modify_pattern_sw_icm_alloc_blocks) {

		WARN_ON(!bitmap_empty(dm->header_modify_pattern_sw_icm_alloc_blocks,

				      BIT(MLX5_CAP_DEV_MEM(dev,

							   log_header_modify_pattern_sw_icm_size) -

					  MLX5_LOG_SW_ICM_BLOCK_SIZE(dev))));

		kfree(dm->header_modify_pattern_sw_icm_alloc_blocks);

	}



	kfree(dm);

}
@@ -130,6 +160,13 @@ int mlx5_dm_sw_icm_alloc(struct mlx5_core_dev *dev, enum mlx5_sw_icm_type type, 
						log_header_modify_sw_icm_size);

		block_map = dm->header_modify_sw_icm_alloc_blocks;

		break;

	case MLX5_SW_ICM_TYPE_HEADER_MODIFY_PATTERN:

		icm_start_addr = MLX5_CAP64_DEV_MEM(dev,

						    header_modify_pattern_sw_icm_start_address);

		log_icm_size = MLX5_CAP_DEV_MEM(dev,

						log_header_modify_pattern_sw_icm_size);

		block_map = dm->header_modify_pattern_sw_icm_alloc_blocks;

		break;

	default:

		return -EINVAL;

	}
@@ -203,6 +240,11 @@ int mlx5_dm_sw_icm_dealloc(struct mlx5_core_dev *dev, enum mlx5_sw_icm_type type 
		icm_start_addr = MLX5_CAP64_DEV_MEM(dev, header_modify_sw_icm_start_address);

		block_map = dm->header_modify_sw_icm_alloc_blocks;

		break;

	case MLX5_SW_ICM_TYPE_HEADER_MODIFY_PATTERN:

		icm_start_addr = MLX5_CAP64_DEV_MEM(dev,

						    header_modify_pattern_sw_icm_start_address);

		block_map = dm->header_modify_pattern_sw_icm_alloc_blocks;

		break;

	default:

		return -EINVAL;

	}

include/linux/mlx5/driver.h

+1 −0
Original line number Diff line number Diff line
@@ -676,6 +676,7 @@ struct mlx5e_resources { 
enum mlx5_sw_icm_type {

	MLX5_SW_ICM_TYPE_STEERING,

	MLX5_SW_ICM_TYPE_HEADER_MODIFY,

	MLX5_SW_ICM_TYPE_HEADER_MODIFY_PATTERN,

};



#define MLX5_MAX_RESERVED_GIDS 8