Commit 65c391b3 authored by Rajeev Nandan's avatar Rajeev Nandan Committed by Rob Clark
Browse files

drm/msm/dsi: Add DSI support for SC7280 



Add support for v2.5.0 DSI block in the SC7280 SoC.

Signed-off-by: default avatarRajeev Nandan <rajeevny@codeaurora.org>
Reviewed-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/1624365748-24224-4-git-send-email-rajeevny@codeaurora.org


Reviewed-by: default avatarStephen Boyd <swboyd@chromium.org>
Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: default avatarRob Clark <robdclark@chromium.org>
parent 6af92798

drivers/gpu/drm/msm/dsi/dsi_cfg.c

+20 −0
Original line number Diff line number Diff line
@@ -196,6 +196,24 @@ static const struct msm_dsi_config sc7180_dsi_cfg = { 
	.num_dsi = 1,

};



static const char * const dsi_sc7280_bus_clk_names[] = {

	"iface", "bus",

};



static const struct msm_dsi_config sc7280_dsi_cfg = {

	.io_offset = DSI_6G_REG_SHIFT,

	.reg_cfg = {

		.num = 1,

		.regs = {

			{"vdda", 8350, 0 },	/* 1.2 V */

		},

	},

	.bus_clk_names = dsi_sc7280_bus_clk_names,

	.num_bus_clks = ARRAY_SIZE(dsi_sc7280_bus_clk_names),

	.io_start = { 0xae94000 },

	.num_dsi = 1,

};



static const struct msm_dsi_host_cfg_ops msm_dsi_v2_host_ops = {

	.link_clk_set_rate = dsi_link_clk_set_rate_v2,

	.link_clk_enable = dsi_link_clk_enable_v2,
@@ -263,6 +281,8 @@ static const struct msm_dsi_cfg_handler dsi_cfg_handlers[] = { 
		&sdm845_dsi_cfg, &msm_dsi_6g_v2_host_ops},

	{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_4_1,

		&sc7180_dsi_cfg, &msm_dsi_6g_v2_host_ops},

	{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_5_0,

		&sc7280_dsi_cfg, &msm_dsi_6g_v2_host_ops},

};



const struct msm_dsi_cfg_handler *msm_dsi_cfg_get(u32 major, u32 minor)

drivers/gpu/drm/msm/dsi/dsi_cfg.h

+1 −0
Original line number Diff line number Diff line
@@ -24,6 +24,7 @@ 
#define MSM_DSI_6G_VER_MINOR_V2_3_0	0x20030000

#define MSM_DSI_6G_VER_MINOR_V2_4_0	0x20040000

#define MSM_DSI_6G_VER_MINOR_V2_4_1	0x20040001

#define MSM_DSI_6G_VER_MINOR_V2_5_0	0x20050000



#define MSM_DSI_V2_VER_MINOR_8064	0x0