Loading drivers/pci/ats.c +2 −1 Original line number Diff line number Diff line Loading @@ -189,6 +189,7 @@ void pci_pri_init(struct pci_dev *pdev) /** * pci_enable_pri - Enable PRI capability * @pdev: PCI device structure * @reqs: outstanding requests * * Returns 0 on success, negative value on error */ Loading drivers/pci/controller/dwc/pcie-designware-ep.c +1 −1 Original line number Diff line number Diff line // SPDX-License-Identifier: GPL-2.0 /** /* * Synopsys DesignWare PCIe Endpoint controller driver * * Copyright (C) 2017 Texas Instruments Loading drivers/pci/controller/pcie-rockchip-ep.c +1 −0 Original line number Diff line number Diff line Loading @@ -22,6 +22,7 @@ /** * struct rockchip_pcie_ep - private data for PCIe endpoint controller driver * @rockchip: Rockchip PCIe controller * @epc: PCI EPC device * @max_regions: maximum number of regions supported by hardware * @ob_region_map: bitmask of mapped outbound regions * @ob_addr: base addresses in the AXI bus where the outbound regions start Loading drivers/pci/endpoint/functions/pci-epf-test.c +1 −1 Original line number Diff line number Diff line Loading @@ -181,7 +181,7 @@ static int pci_epf_test_init_dma_chan(struct pci_epf_test *epf_test) /** * pci_epf_test_clean_dma_chan() - Function to cleanup EPF test DMA channel * @epf: the EPF test device that performs data transfer operation * @epf_test: the EPF test device that performs data transfer operation * * Helper to cleanup EPF test DMA channel. */ Loading drivers/pci/endpoint/pci-ep-cfs.c +1 −1 Original line number Diff line number Diff line // SPDX-License-Identifier: GPL-2.0 /** /* * configfs to configure the PCI endpoint * * Copyright (C) 2017 Texas Instruments Loading Loading
drivers/pci/ats.c +2 −1 Original line number Diff line number Diff line Loading @@ -189,6 +189,7 @@ void pci_pri_init(struct pci_dev *pdev) /** * pci_enable_pri - Enable PRI capability * @pdev: PCI device structure * @reqs: outstanding requests * * Returns 0 on success, negative value on error */ Loading
drivers/pci/controller/dwc/pcie-designware-ep.c +1 −1 Original line number Diff line number Diff line // SPDX-License-Identifier: GPL-2.0 /** /* * Synopsys DesignWare PCIe Endpoint controller driver * * Copyright (C) 2017 Texas Instruments Loading
drivers/pci/controller/pcie-rockchip-ep.c +1 −0 Original line number Diff line number Diff line Loading @@ -22,6 +22,7 @@ /** * struct rockchip_pcie_ep - private data for PCIe endpoint controller driver * @rockchip: Rockchip PCIe controller * @epc: PCI EPC device * @max_regions: maximum number of regions supported by hardware * @ob_region_map: bitmask of mapped outbound regions * @ob_addr: base addresses in the AXI bus where the outbound regions start Loading
drivers/pci/endpoint/functions/pci-epf-test.c +1 −1 Original line number Diff line number Diff line Loading @@ -181,7 +181,7 @@ static int pci_epf_test_init_dma_chan(struct pci_epf_test *epf_test) /** * pci_epf_test_clean_dma_chan() - Function to cleanup EPF test DMA channel * @epf: the EPF test device that performs data transfer operation * @epf_test: the EPF test device that performs data transfer operation * * Helper to cleanup EPF test DMA channel. */ Loading
drivers/pci/endpoint/pci-ep-cfs.c +1 −1 Original line number Diff line number Diff line // SPDX-License-Identifier: GPL-2.0 /** /* * configfs to configure the PCI endpoint * * Copyright (C) 2017 Texas Instruments Loading