Commit 6554d9a0 authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/radeon: fix copy paste typos in fan control for si/ci 



Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent c9d61b00

drivers/gpu/drm/radeon/ci_dpm.c

+3 −3
Original line number Diff line number Diff line
@@ -937,7 +937,7 @@ static void ci_fan_ctrl_set_static_mode(struct radeon_device *rdev, u32 mode) 
	tmp |= TMIN(0);

	WREG32_SMC(CG_FDO_CTRL2, tmp);



	tmp = RREG32_SMC(CG_FDO_CTRL2) & FDO_PWM_MODE_MASK;

	tmp = RREG32_SMC(CG_FDO_CTRL2) & ~FDO_PWM_MODE_MASK;

	tmp |= FDO_PWM_MODE(mode);

	WREG32_SMC(CG_FDO_CTRL2, tmp);

}
@@ -1162,7 +1162,7 @@ static int ci_fan_ctrl_set_fan_speed_rpm(struct radeon_device *rdev, 
	tmp |= TARGET_PERIOD(tach_period);

	WREG32_SMC(CG_TACH_CTRL, tmp);



	ci_fan_ctrl_set_static_mode(rdev, FDO_PWM_MODE_STATIC);

	ci_fan_ctrl_set_static_mode(rdev, FDO_PWM_MODE_STATIC_RPM);



	return 0;

}
@@ -1178,7 +1178,7 @@ static void ci_fan_ctrl_set_default_mode(struct radeon_device *rdev) 
		tmp |= FDO_PWM_MODE(pi->fan_ctrl_default_mode);

		WREG32_SMC(CG_FDO_CTRL2, tmp);



		tmp = RREG32_SMC(CG_FDO_CTRL2) & TMIN_MASK;

		tmp = RREG32_SMC(CG_FDO_CTRL2) & ~TMIN_MASK;

		tmp |= TMIN(pi->t_min);

		WREG32_SMC(CG_FDO_CTRL2, tmp);

		pi->fan_ctrl_is_in_default_mode = true;

drivers/gpu/drm/radeon/si_dpm.c

+3 −3
Original line number Diff line number Diff line
@@ -5893,7 +5893,7 @@ static void si_fan_ctrl_set_static_mode(struct radeon_device *rdev, u32 mode) 
	tmp |= TMIN(0);

	WREG32(CG_FDO_CTRL2, tmp);



	tmp = RREG32(CG_FDO_CTRL2) & FDO_PWM_MODE_MASK;

	tmp = RREG32(CG_FDO_CTRL2) & ~FDO_PWM_MODE_MASK;

	tmp |= FDO_PWM_MODE(mode);

	WREG32(CG_FDO_CTRL2, tmp);

}
@@ -6098,7 +6098,7 @@ static int si_fan_ctrl_set_fan_speed_rpm(struct radeon_device *rdev, 
	tmp |= TARGET_PERIOD(tach_period);

	WREG32(CG_TACH_CTRL, tmp);



	si_fan_ctrl_set_static_mode(rdev, FDO_PWM_MODE_STATIC);

	si_fan_ctrl_set_static_mode(rdev, FDO_PWM_MODE_STATIC_RPM);



	return 0;

}
@@ -6114,7 +6114,7 @@ static void si_fan_ctrl_set_default_mode(struct radeon_device *rdev) 
		tmp |= FDO_PWM_MODE(si_pi->fan_ctrl_default_mode);

		WREG32(CG_FDO_CTRL2, tmp);



		tmp = RREG32(CG_FDO_CTRL2) & TMIN_MASK;

		tmp = RREG32(CG_FDO_CTRL2) & ~TMIN_MASK;

		tmp |= TMIN(si_pi->t_min);

		WREG32(CG_FDO_CTRL2, tmp);

		si_pi->fan_ctrl_is_in_default_mode = true;