Commit 650ea1f6 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'x86_fpu_for_v6.0_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull x86 fpu update from Borislav Petkov:

 - Add machinery to initialize AMX register state in order for
   AMX-capable CPUs to be able to enter deeper low-power state

* tag 'x86_fpu_for_v6.0_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  intel_idle: Add a new flag to initialize the AMX state
  x86/fpu: Add a helper to prepare AMX state for low-power CPU idle
parents 92598ae2 9f011293

arch/x86/include/asm/fpu/api.h

+2 −0
Original line number Diff line number Diff line
@@ -164,4 +164,6 @@ static inline bool fpstate_is_confidential(struct fpu_guest *gfpu) 
/* prctl */

extern long fpu_xstate_prctl(int option, unsigned long arg2);



extern void fpu_idle_fpregs(void);



#endif /* _ASM_X86_FPU_API_H */

arch/x86/include/asm/special_insns.h

+9 −0
Original line number Diff line number Diff line
@@ -295,6 +295,15 @@ static inline int enqcmds(void __iomem *dst, const void *src) 
	return 0;

}



static inline void tile_release(void)

{

	/*

	 * Instruction opcode for TILERELEASE; supported in binutils

	 * version >= 2.36.

	 */

	asm volatile(".byte 0xc4, 0xe2, 0x78, 0x49, 0xc0");

}



#endif /* __KERNEL__ */



#endif /* _ASM_X86_SPECIAL_INSNS_H */

arch/x86/kernel/fpu/core.c

+14 −0
Original line number Diff line number Diff line
@@ -851,3 +851,17 @@ int fpu__exception_code(struct fpu *fpu, int trap_nr) 
	 */

	return 0;

}



/*

 * Initialize register state that may prevent from entering low-power idle.

 * This function will be invoked from the cpuidle driver only when needed.

 */

void fpu_idle_fpregs(void)

{

	/* Note: AMX_TILE being enabled implies XGETBV1 support */

	if (cpu_feature_enabled(X86_FEATURE_AMX_TILE) &&

	    (xfeatures_in_use() & XFEATURE_MASK_XTILE)) {

		tile_release();

		fpregs_deactivate(&current->thread.fpu);

	}

}

drivers/idle/intel_idle.c

+23 −2
Original line number Diff line number Diff line
@@ -56,6 +56,7 @@ 
#include <asm/nospec-branch.h>

#include <asm/mwait.h>

#include <asm/msr.h>

#include <asm/fpu/api.h>



#define INTEL_IDLE_VERSION "0.5.1"
@@ -113,6 +114,11 @@ static unsigned int mwait_substates __initdata; 
 */

#define CPUIDLE_FLAG_IBRS		BIT(16)



/*

 * Initialize large xstate for the C6-state entrance.

 */

#define CPUIDLE_FLAG_INIT_XSTATE	BIT(17)



/*

 * MWAIT takes an 8-bit "hint" in EAX "suggesting"

 * the C-state (top nibble) and sub-state (bottom nibble)
@@ -191,6 +197,13 @@ static __cpuidle int intel_idle_ibrs(struct cpuidle_device *dev, 
	return ret;

}



static __cpuidle int intel_idle_xstate(struct cpuidle_device *dev,

				       struct cpuidle_driver *drv, int index)

{

	fpu_idle_fpregs();

	return __intel_idle(dev, drv, index);

}



/**

 * intel_idle_s2idle - Ask the processor to enter the given idle state.

 * @dev: cpuidle device of the target CPU.
@@ -206,8 +219,12 @@ static __cpuidle int intel_idle_ibrs(struct cpuidle_device *dev, 
static __cpuidle int intel_idle_s2idle(struct cpuidle_device *dev,

				       struct cpuidle_driver *drv, int index)

{

	unsigned long eax = flg2MWAIT(drv->states[index].flags);

	unsigned long ecx = 1; /* break on interrupt flag */

	struct cpuidle_state *state = &drv->states[index];

	unsigned long eax = flg2MWAIT(state->flags);



	if (state->flags & CPUIDLE_FLAG_INIT_XSTATE)

		fpu_idle_fpregs();



	mwait_idle_with_hints(eax, ecx);
@@ -942,7 +959,8 @@ static struct cpuidle_state spr_cstates[] __initdata = { 
	{

		.name = "C6",

		.desc = "MWAIT 0x20",

		.flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,

		.flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED |

					   CPUIDLE_FLAG_INIT_XSTATE,

		.exit_latency = 290,

		.target_residency = 800,

		.enter = &intel_idle,
@@ -1857,6 +1875,9 @@ static void __init intel_idle_init_cstates_icpu(struct cpuidle_driver *drv) 
			drv->states[drv->state_count].enter = intel_idle_ibrs;

		}



		if (cpuidle_state_table[cstate].flags & CPUIDLE_FLAG_INIT_XSTATE)

			drv->states[drv->state_count].enter = intel_idle_xstate;



		if ((disabled_states_mask & BIT(drv->state_count)) ||

		    ((icpu->use_acpi || force_use_acpi) &&

		     intel_idle_off_by_default(mwait_hint) &&