Commit 64f7c698 authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nouveau/fifo: add engine_id hook 



Will be used by common code in subsequent commits to replace arrays
indexed by subdev index.

Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
Reviewed-by: default avatarLyude Paul <lyude@redhat.com>
parent ab0db2bd

drivers/gpu/drm/nouveau/nvkm/engine/fifo/chang84.c

+1 −21
Original line number Diff line number Diff line
@@ -44,26 +44,6 @@ g84_fifo_chan_ntfy(struct nvkm_fifo_chan *chan, u32 type, 
	return -EINVAL;

}



static int

g84_fifo_chan_engine(struct nvkm_engine *engine)

{

	switch (engine->subdev.index) {

	case NVKM_ENGINE_GR    : return 0;

	case NVKM_ENGINE_MPEG  :

	case NVKM_ENGINE_MSPPP : return 1;

	case NVKM_ENGINE_CE0   : return 2;

	case NVKM_ENGINE_VP    :

	case NVKM_ENGINE_MSPDEC: return 3;

	case NVKM_ENGINE_CIPHER:

	case NVKM_ENGINE_SEC   : return 4;

	case NVKM_ENGINE_BSP   :

	case NVKM_ENGINE_MSVLD : return 5;

	default:

		WARN_ON(1);

		return 0;

	}

}



static int

g84_fifo_chan_engine_addr(struct nvkm_engine *engine)

{
@@ -102,7 +82,7 @@ g84_fifo_chan_engine_fini(struct nvkm_fifo_chan *base, 
	if (offset < 0)

		return 0;



	engn = g84_fifo_chan_engine(engine);

	engn = fifo->base.func->engine_id(&fifo->base, engine);

	save = nvkm_mask(device, 0x002520, 0x0000003f, 1 << engn);

	nvkm_wr32(device, 0x0032fc, chan->base.inst->addr >> 12);

	done = nvkm_msec(device, 2000,

drivers/gpu/drm/nouveau/nvkm/engine/fifo/changf100.h

+8 −1
Original line number Diff line number Diff line
@@ -12,7 +12,14 @@ struct gf100_fifo_chan { 
	struct list_head head;

	bool killed;



	struct {

#define GF100_FIFO_ENGN_GR     0

#define GF100_FIFO_ENGN_MSPDEC 1

#define GF100_FIFO_ENGN_MSPPP  2

#define GF100_FIFO_ENGN_MSVLD  3

#define GF100_FIFO_ENGN_CE0    4

#define GF100_FIFO_ENGN_CE1    5

#define GF100_FIFO_ENGN_SW     15

	struct gf100_fifo_engn {

		struct nvkm_gpuobj *inst;

		struct nvkm_vma *vma;

	} engn[NVKM_SUBDEV_NR];

drivers/gpu/drm/nouveau/nvkm/engine/fifo/changk104.h

+2 −1
Original line number Diff line number Diff line
@@ -16,7 +16,8 @@ struct gk104_fifo_chan { 


	struct nvkm_memory *mthd;



	struct {

#define GK104_FIFO_ENGN_SW 15

	struct gk104_fifo_engn {

		struct nvkm_gpuobj *inst;

		struct nvkm_vma *vma;

	} engn[NVKM_SUBDEV_NR];

drivers/gpu/drm/nouveau/nvkm/engine/fifo/channv04.h

+4 −0
Original line number Diff line number Diff line
@@ -9,6 +9,10 @@ struct nv04_fifo_chan { 
	struct nvkm_fifo_chan base;

	struct nv04_fifo *fifo;

	u32 ramfc;

#define NV04_FIFO_ENGN_SW   0

#define NV04_FIFO_ENGN_GR   1

#define NV04_FIFO_ENGN_MPEG 2

#define NV04_FIFO_ENGN_DMA  3

	struct nvkm_gpuobj *engn[NVKM_SUBDEV_NR];

};

drivers/gpu/drm/nouveau/nvkm/engine/fifo/channv50.h

+19 −0
Original line number Diff line number Diff line
@@ -15,6 +15,25 @@ struct nv50_fifo_chan { 
	struct nvkm_gpuobj *pgd;

	struct nvkm_ramht *ramht;



#define NV50_FIFO_ENGN_SW   0

#define NV50_FIFO_ENGN_GR   1

#define NV50_FIFO_ENGN_MPEG 2

#define NV50_FIFO_ENGN_DMA  3



#define G84_FIFO_ENGN_SW     0

#define G84_FIFO_ENGN_GR     1

#define G84_FIFO_ENGN_MPEG   2

#define G84_FIFO_ENGN_MSPPP  2

#define G84_FIFO_ENGN_ME     3

#define G84_FIFO_ENGN_CE0    3

#define G84_FIFO_ENGN_VP     4

#define G84_FIFO_ENGN_MSPDEC 4

#define G84_FIFO_ENGN_CIPHER 5

#define G84_FIFO_ENGN_SEC    5

#define G84_FIFO_ENGN_VIC    5

#define G84_FIFO_ENGN_BSP    6

#define G84_FIFO_ENGN_MSVLD  6

#define G84_FIFO_ENGN_DMA    7

	struct nvkm_gpuobj *engn[NVKM_SUBDEV_NR];

};