Commit 64e11cb7 authored by Yann Gautier's avatar Yann Gautier Committed by Alexandre Torgue
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ARM: dts: stm32: add sdmmc2 & 3 nodes for STM32MP157 SoC 



The STM32MP157 SoC series includes 3 instances of the SDMMC peripheral.
The sdmmc2 and sdmmc3 nodes are added in STM32MP157 SoC DT file.

Signed-off-by: default avatarLudovic Barre <ludovic.barre@st.com>
Signed-off-by: default avatarYann Gautier <yann.gautier@st.com>
Signed-off-by: default avatarAlexandre Torgue <alexandre.torgue@st.com>
parent 0a1732cf

arch/arm/boot/dts/stm32mp157c.dtsi

+32 −1
Original line number Diff line number Diff line
@@ -1060,6 +1060,21 @@ 
			};

		};



		sdmmc3: sdmmc@48004000 {

			compatible = "arm,pl18x", "arm,primecell";

			arm,primecell-periphid = <0x10153180>;

			reg = <0x48004000 0x400>;

			interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "cmd_irq";

			clocks = <&rcc SDMMC3_K>;

			clock-names = "apb_pclk";

			resets = <&rcc SDMMC3_R>;

			cap-sd-highspeed;

			cap-mmc-highspeed;

			max-frequency = <120000000>;

			status = "disabled";

		};



		usbotg_hs: usb-otg@49000000 {

			compatible = "snps,dwc2";

			reg = <0x49000000 0x10000>;
@@ -1355,6 +1370,22 @@ 
			cap-sd-highspeed;

			cap-mmc-highspeed;

			max-frequency = <120000000>;

			status = "disabled";

		};



		sdmmc2: sdmmc@58007000 {

			compatible = "arm,pl18x", "arm,primecell";

			arm,primecell-periphid = <0x10153180>;

			reg = <0x58007000 0x1000>;

			interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "cmd_irq";

			clocks = <&rcc SDMMC2_K>;

			clock-names = "apb_pclk";

			resets = <&rcc SDMMC2_R>;

			cap-sd-highspeed;

			cap-mmc-highspeed;

			max-frequency = <120000000>;

			status = "disabled";

		};



		crc1: crc@58009000 {