Loading arch/arm/mach-zynq/Makefile +1 −1 Original line number Diff line number Diff line Loading @@ -3,4 +3,4 @@ # # Common support obj-y := common.o obj-y := common.o slcr.o arch/arm/mach-zynq/common.c +1 −9 Original line number Diff line number Diff line Loading @@ -61,15 +61,7 @@ static void __init xilinx_init_machine(void) static void __init xilinx_zynq_timer_init(void) { struct device_node *np; void __iomem *slcr; np = of_find_compatible_node(NULL, NULL, "xlnx,zynq-slcr"); slcr = of_iomap(np, 0); WARN_ON(!slcr); xilinx_zynq_clocks_init(slcr); zynq_slcr_init(); clocksource_of_init(); } Loading arch/arm/mach-zynq/common.h +3 −0 Original line number Diff line number Diff line Loading @@ -17,6 +17,9 @@ #ifndef __MACH_ZYNQ_COMMON_H__ #define __MACH_ZYNQ_COMMON_H__ extern int zynq_slcr_init(void); extern void __iomem *zynq_slcr_base; extern void __iomem *zynq_scu_base; #endif arch/arm/mach-zynq/slcr.c 0 → 100644 +69 −0 Original line number Diff line number Diff line /* * Xilinx SLCR driver * * Copyright (c) 2011-2013 Xilinx Inc. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version * 2 of the License, or (at your option) any later version. * * You should have received a copy of the GNU General Public * License along with this program; if not, write to the Free * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA * 02139, USA. */ #include <linux/export.h> #include <linux/io.h> #include <linux/fs.h> #include <linux/interrupt.h> #include <linux/init.h> #include <linux/kernel.h> #include <linux/module.h> #include <linux/of_address.h> #include <linux/uaccess.h> #include <linux/platform_device.h> #include <linux/slab.h> #include <linux/string.h> #include <linux/clk/zynq.h> #include "common.h" #define SLCR_UNLOCK_MAGIC 0xDF0D #define SLCR_UNLOCK 0x8 /* SCLR unlock register */ void __iomem *zynq_slcr_base; /** * zynq_slcr_init * Returns 0 on success, negative errno otherwise. * * Called early during boot from platform code to remap SLCR area. */ int __init zynq_slcr_init(void) { struct device_node *np; np = of_find_compatible_node(NULL, NULL, "xlnx,zynq-slcr"); if (!np) { pr_err("%s: no slcr node found\n", __func__); BUG(); } zynq_slcr_base = of_iomap(np, 0); if (!zynq_slcr_base) { pr_err("%s: Unable to map I/O memory\n", __func__); BUG(); } /* unlock the SLCR so that registers can be changed */ writel(SLCR_UNLOCK_MAGIC, zynq_slcr_base + SLCR_UNLOCK); pr_info("%s mapped to %p\n", np->name, zynq_slcr_base); xilinx_zynq_clocks_init(zynq_slcr_base); of_node_put(np); return 0; } Loading
arch/arm/mach-zynq/Makefile +1 −1 Original line number Diff line number Diff line Loading @@ -3,4 +3,4 @@ # # Common support obj-y := common.o obj-y := common.o slcr.o
arch/arm/mach-zynq/common.c +1 −9 Original line number Diff line number Diff line Loading @@ -61,15 +61,7 @@ static void __init xilinx_init_machine(void) static void __init xilinx_zynq_timer_init(void) { struct device_node *np; void __iomem *slcr; np = of_find_compatible_node(NULL, NULL, "xlnx,zynq-slcr"); slcr = of_iomap(np, 0); WARN_ON(!slcr); xilinx_zynq_clocks_init(slcr); zynq_slcr_init(); clocksource_of_init(); } Loading
arch/arm/mach-zynq/common.h +3 −0 Original line number Diff line number Diff line Loading @@ -17,6 +17,9 @@ #ifndef __MACH_ZYNQ_COMMON_H__ #define __MACH_ZYNQ_COMMON_H__ extern int zynq_slcr_init(void); extern void __iomem *zynq_slcr_base; extern void __iomem *zynq_scu_base; #endif
arch/arm/mach-zynq/slcr.c 0 → 100644 +69 −0 Original line number Diff line number Diff line /* * Xilinx SLCR driver * * Copyright (c) 2011-2013 Xilinx Inc. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version * 2 of the License, or (at your option) any later version. * * You should have received a copy of the GNU General Public * License along with this program; if not, write to the Free * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA * 02139, USA. */ #include <linux/export.h> #include <linux/io.h> #include <linux/fs.h> #include <linux/interrupt.h> #include <linux/init.h> #include <linux/kernel.h> #include <linux/module.h> #include <linux/of_address.h> #include <linux/uaccess.h> #include <linux/platform_device.h> #include <linux/slab.h> #include <linux/string.h> #include <linux/clk/zynq.h> #include "common.h" #define SLCR_UNLOCK_MAGIC 0xDF0D #define SLCR_UNLOCK 0x8 /* SCLR unlock register */ void __iomem *zynq_slcr_base; /** * zynq_slcr_init * Returns 0 on success, negative errno otherwise. * * Called early during boot from platform code to remap SLCR area. */ int __init zynq_slcr_init(void) { struct device_node *np; np = of_find_compatible_node(NULL, NULL, "xlnx,zynq-slcr"); if (!np) { pr_err("%s: no slcr node found\n", __func__); BUG(); } zynq_slcr_base = of_iomap(np, 0); if (!zynq_slcr_base) { pr_err("%s: Unable to map I/O memory\n", __func__); BUG(); } /* unlock the SLCR so that registers can be changed */ writel(SLCR_UNLOCK_MAGIC, zynq_slcr_base + SLCR_UNLOCK); pr_info("%s mapped to %p\n", np->name, zynq_slcr_base); xilinx_zynq_clocks_init(zynq_slcr_base); of_node_put(np); return 0; }