Commit 64922d37 authored by Grygorii Strashko's avatar Grygorii Strashko Committed by David S. Miller
Browse files

net: ethernet: ti: cpsw: use dev_id for ale configuration 



The previous patch has introduced possibility to select CPSW ALE by using
ALE dev_id identifier. Switch TI cpsw driver to use dev_id="cpsw" and
perform clean up by removing "ale_entries" configuration code.

Signed-off-by: default avatarGrygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 6a68df93

drivers/net/ethernet/ti/cpsw.c

+0 −6
Original line number Diff line number Diff line
@@ -1278,12 +1278,6 @@ static int cpsw_probe_dt(struct cpsw_platform_data *data, 
	}

	data->channels = prop;



	if (of_property_read_u32(node, "ale_entries", &prop)) {

		dev_err(&pdev->dev, "Missing ale_entries property in the DT.\n");

		return -EINVAL;

	}

	data->ale_entries = prop;



	if (of_property_read_u32(node, "bd_ram_size", &prop)) {

		dev_err(&pdev->dev, "Missing bd_ram_size property in the DT.\n");

		return -EINVAL;

drivers/net/ethernet/ti/cpsw_new.c

+0 −1
Original line number Diff line number Diff line
@@ -1243,7 +1243,6 @@ static int cpsw_probe_dt(struct cpsw_common *cpsw) 


	data->active_slave = 0;

	data->channels = CPSW_MAX_QUEUES;

	data->ale_entries = CPSW_ALE_NUM_ENTRIES;

	data->dual_emac = true;

	data->bd_ram_size = CPSW_BD_RAM_SIZE;

	data->mac_control = 0;

drivers/net/ethernet/ti/cpsw_priv.c

+1 −1
Original line number Diff line number Diff line
@@ -500,8 +500,8 @@ int cpsw_init_common(struct cpsw_common *cpsw, void __iomem *ss_regs, 


	ale_params.dev			= dev;

	ale_params.ale_ageout		= ale_ageout;

	ale_params.ale_entries		= data->ale_entries;

	ale_params.ale_ports		= CPSW_ALE_PORTS_NUM;

	ale_params.dev_id		= "cpsw";



	cpsw->ale = cpsw_ale_create(&ale_params);

	if (IS_ERR(cpsw->ale)) {

drivers/net/ethernet/ti/cpsw_priv.h

+0 −2
Original line number Diff line number Diff line
@@ -117,7 +117,6 @@ do { \ 
#define CPSW_MAX_QUEUES		8

#define CPSW_CPDMA_DESCS_POOL_SIZE_DEFAULT 256

#define CPSW_ALE_AGEOUT_DEFAULT		10 /* sec */

#define CPSW_ALE_NUM_ENTRIES		1024

#define CPSW_FIFO_QUEUE_TYPE_SHIFT	16

#define CPSW_FIFO_SHAPE_EN_SHIFT	16

#define CPSW_FIFO_RATE_EN_SHIFT		20
@@ -294,7 +293,6 @@ struct cpsw_platform_data { 
	u32	channels;	/* number of cpdma channels (symmetric) */

	u32	slaves;		/* number of slave cpgmac ports */

	u32	active_slave;/* time stamping, ethtool and SIOCGMIIPHY slave */

	u32	ale_entries;	/* ale table size */

	u32	bd_ram_size;	/*buffer descriptor ram size */

	u32	mac_control;	/* Mac control register */

	u16	default_vlan;	/* Def VLAN for ALE lookup in VLAN aware mode*/