Commit 63e40806 authored by Nicholas Piggin's avatar Nicholas Piggin Committed by Michael Ellerman
Browse files

powerpc/64s: save one more register in the masked interrupt handler 



This frees up one more register (and takes advantage of that to
clean things up a little bit).

This register will be used in the following patch.

Signed-off-by: default avatarNicholas Piggin <npiggin@gmail.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20210617155116.2167984-9-npiggin@gmail.com
parent dd152f70

arch/powerpc/kernel/exceptions-64s.S

+20 −14
Original line number Original line Diff line number Diff line
@@ -2633,7 +2633,6 @@ INT_DEFINE_END(soft_nmi) 
 * and run it entirely with interrupts hard disabled.

 * and run it entirely with interrupts hard disabled.

 */

 */

EXC_COMMON_BEGIN(soft_nmi_common)

EXC_COMMON_BEGIN(soft_nmi_common)

	mfspr	r11,SPRN_SRR0

	mr	r10,r1

	mr	r10,r1

	ld	r1,PACAEMERGSP(r13)

	ld	r1,PACAEMERGSP(r13)

	subi	r1,r1,INT_FRAME_SIZE

	subi	r1,r1,INT_FRAME_SIZE
@@ -2668,19 +2667,24 @@ masked_Hinterrupt: 
	.else

	.else

masked_interrupt:

masked_interrupt:

	.endif

	.endif

	lbz	r11,PACAIRQHAPPENED(r13)

	stw	r9,PACA_EXGEN+EX_CCR(r13)

	or	r11,r11,r10

	lbz	r9,PACAIRQHAPPENED(r13)

	stb	r11,PACAIRQHAPPENED(r13)

	or	r9,r9,r10

	stb	r9,PACAIRQHAPPENED(r13)



	.if ! \hsrr

	cmpwi	r10,PACA_IRQ_DEC

	cmpwi	r10,PACA_IRQ_DEC

	bne	1f

	bne	1f

	lis	r10,0x7fff

	LOAD_REG_IMMEDIATE(r9, 0x7fffffff)

	ori	r10,r10,0xffff

	mtspr	SPRN_DEC,r9

	mtspr	SPRN_DEC,r10

#ifdef CONFIG_PPC_WATCHDOG

#ifdef CONFIG_PPC_WATCHDOG

	lwz	r9,PACA_EXGEN+EX_CCR(r13)

	b	soft_nmi_common

	b	soft_nmi_common

#else

#else

	b	2f

	b	2f

#endif

#endif

	.endif



1:	andi.	r10,r10,PACA_IRQ_MUST_HARD_MASK

1:	andi.	r10,r10,PACA_IRQ_MUST_HARD_MASK

	beq	2f

	beq	2f

	xori	r12,r12,MSR_EE	/* clear MSR_EE */

	xori	r12,r12,MSR_EE	/* clear MSR_EE */
@@ -2689,17 +2693,19 @@ masked_interrupt: 
	.else

	.else

	mtspr	SPRN_SRR1,r12

	mtspr	SPRN_SRR1,r12

	.endif

	.endif

	ori	r11,r11,PACA_IRQ_HARD_DIS

	ori	r9,r9,PACA_IRQ_HARD_DIS

	stb	r11,PACAIRQHAPPENED(r13)

	stb	r9,PACAIRQHAPPENED(r13)

2:	/* done */

2:	/* done */

	li	r10,0

	li	r9,0

	.if \hsrr

	.if \hsrr

	stb	r10,PACAHSRR_VALID(r13)

	stb	r9,PACAHSRR_VALID(r13)

	.else

	.else

	stb	r10,PACASRR_VALID(r13)

	stb	r9,PACASRR_VALID(r13)

	.endif

	.endif

	ld	r10,PACA_EXGEN+EX_CTR(r13)



	mtctr	r10

	ld	r9,PACA_EXGEN+EX_CTR(r13)

	mtctr	r9

	lwz	r9,PACA_EXGEN+EX_CCR(r13)

	mtcrf	0x80,r9

	mtcrf	0x80,r9

	std	r1,PACAR1(r13)

	std	r1,PACAR1(r13)

	ld	r9,PACA_EXGEN+EX_R9(r13)

	ld	r9,PACA_EXGEN+EX_R9(r13)