Commit 63de4f04 authored by Jake Wang's avatar Jake Wang Committed by Alex Deucher
Browse files

drm/amd/display: Added multi instance support for ABM 



[WHY & HOW]
ABM assumes only 1 eDP is connected. Refactored existing
ABM interface to support multiple instances.

Signed-off-by: default avatarJake Wang <haonan.wang2@amd.com>
Reviewed-by: default avatarNicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: default avatarWayne Lin <waynelin@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 130ac6d8

drivers/gpu/drm/amd/display/dc/dce/dmub_abm.c

+30 −0
Original line number Diff line number Diff line
@@ -56,11 +56,19 @@ static void dmub_abm_enable_fractional_pwm(struct dc_context *dc) 
{

	union dmub_rb_cmd cmd;

	uint32_t fractional_pwm = (dc->dc->config.disable_fractional_pwm == false) ? 1 : 0;

	uint32_t edp_id_count = dc->dc_edp_id_count;

	int i;

	uint8_t panel_mask = 0;



	for (i = 0; i < edp_id_count; i++)

		panel_mask |= 0x01 << i;



	memset(&cmd, 0, sizeof(cmd));

	cmd.abm_set_pwm_frac.header.type = DMUB_CMD__ABM;

	cmd.abm_set_pwm_frac.header.sub_type = DMUB_CMD__ABM_SET_PWM_FRAC;

	cmd.abm_set_pwm_frac.abm_set_pwm_frac_data.fractional_pwm = fractional_pwm;

	cmd.abm_set_pwm_frac.abm_set_pwm_frac_data.version = DMUB_CMD_ABM_CONTROL_VERSION_1;

	cmd.abm_set_pwm_frac.abm_set_pwm_frac_data.panel_mask = panel_mask;

	cmd.abm_set_pwm_frac.header.payload_bytes = sizeof(struct dmub_cmd_abm_set_pwm_frac_data);



	dc_dmub_srv_cmd_queue(dc->dmub_srv, &cmd);
@@ -135,11 +143,24 @@ static bool dmub_abm_set_level(struct abm *abm, uint32_t level) 
{

	union dmub_rb_cmd cmd;

	struct dc_context *dc = abm->ctx;

	struct dc_link *edp_links[MAX_NUM_EDP];

	int i;

	int edp_num;

	uint8_t panel_mask = 0;



	get_edp_links(dc->dc, edp_links, &edp_num);



	for (i = 0; i < edp_num; i++) {

		if (edp_links[i]->link_status.link_active)

			panel_mask |= (0x01 << i);

	}



	memset(&cmd, 0, sizeof(cmd));

	cmd.abm_set_level.header.type = DMUB_CMD__ABM;

	cmd.abm_set_level.header.sub_type = DMUB_CMD__ABM_SET_LEVEL;

	cmd.abm_set_level.abm_set_level_data.level = level;

	cmd.abm_set_level.abm_set_level_data.version = DMUB_CMD_ABM_CONTROL_VERSION_1;

	cmd.abm_set_level.abm_set_level_data.panel_mask = panel_mask;

	cmd.abm_set_level.header.payload_bytes = sizeof(struct dmub_cmd_abm_set_level_data);



	dc_dmub_srv_cmd_queue(dc->dmub_srv, &cmd);
@@ -155,6 +176,12 @@ static bool dmub_abm_init_config(struct abm *abm, 
{

	union dmub_rb_cmd cmd;

	struct dc_context *dc = abm->ctx;

	uint32_t edp_id_count = dc->dc_edp_id_count;

	int i;

	uint8_t panel_mask = 0;



	for (i = 0; i < edp_id_count; i++)

		panel_mask |= 0x01 << i;



	// TODO: Optimize by only reading back final 4 bytes

	dmub_flush_buffer_mem(&dc->dmub_srv->dmub->scratch_mem_fb);
@@ -168,6 +195,9 @@ static bool dmub_abm_init_config(struct abm *abm, 
	cmd.abm_init_config.header.sub_type = DMUB_CMD__ABM_INIT_CONFIG;

	cmd.abm_init_config.abm_init_config_data.src.quad_part = dc->dmub_srv->dmub->scratch_mem_fb.gpu_addr;

	cmd.abm_init_config.abm_init_config_data.bytes = bytes;

	cmd.abm_init_config.abm_init_config_data.version = DMUB_CMD_ABM_CONTROL_VERSION_1;

	cmd.abm_init_config.abm_init_config_data.panel_mask = panel_mask;



	cmd.abm_init_config.header.payload_bytes = sizeof(struct dmub_cmd_abm_init_config_data);



	dc_dmub_srv_cmd_queue(dc->dmub_srv, &cmd);

drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hwseq.c

+1 −1
Original line number Diff line number Diff line
@@ -218,7 +218,7 @@ bool dcn21_set_backlight_level(struct pipe_ctx *pipe_ctx, 
	cmd.abm_set_backlight.header.sub_type = DMUB_CMD__ABM_SET_BACKLIGHT;

	cmd.abm_set_backlight.abm_set_backlight_data.frame_ramp = frame_ramp;

	cmd.abm_set_backlight.abm_set_backlight_data.backlight_user_level = backlight_pwm_u16_16;

	cmd.abm_set_backlight.abm_set_backlight_data.version = DMUB_CMD_ABM_SET_BACKLIGHT_VERSION_1;

	cmd.abm_set_backlight.abm_set_backlight_data.version = DMUB_CMD_ABM_CONTROL_VERSION_1;

	cmd.abm_set_backlight.abm_set_backlight_data.panel_mask = (0x01 << panel_cntl->inst);

	cmd.abm_set_backlight.header.payload_bytes = sizeof(struct dmub_cmd_abm_set_backlight_data);

drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h

+74 −5
Original line number Diff line number Diff line
@@ -121,14 +121,14 @@ 
#define TRACE_BUFFER_ENTRY_OFFSET  16



/**

 * ABM backlight control version legacy

 * ABM control version legacy

 */

#define DMUB_CMD_ABM_SET_BACKLIGHT_VERSION_UNKNOWN 0x0

#define DMUB_CMD_ABM_CONTROL_VERSION_UNKNOWN 0x0



/**

 * ABM backlight control version with multi edp support

 * ABM control version with multi edp support

 */

#define DMUB_CMD_ABM_SET_BACKLIGHT_VERSION_1 0x1

#define DMUB_CMD_ABM_CONTROL_VERSION_1 0x1



/**

 * Physical framebuffer address location, 64-bit.
@@ -1637,7 +1637,7 @@ struct dmub_cmd_abm_set_backlight_data { 
	uint32_t backlight_user_level;



	/**

	 * Backlight data version.

	 * ABM control version.

	 */

	uint8_t version;
@@ -1677,6 +1677,23 @@ struct dmub_cmd_abm_set_level_data { 
	 * Set current ABM operating/aggression level.

	 */

	uint32_t level;



	/**

	 * ABM control version.

	 */

	uint8_t version;



	/**

	 * Panel Control HW instance mask.

	 * Bit 0 is Panel Control HW instance 0.

	 * Bit 1 is Panel Control HW instance 1.

	 */

	uint8_t panel_mask;



	/**

	 * Explicit padding to 4 byte boundary.

	 */

	uint8_t pad[2];

};



/**
@@ -1702,6 +1719,23 @@ struct dmub_cmd_abm_set_ambient_level_data { 
	 * Ambient light sensor reading from OS.

	 */

	uint32_t ambient_lux;



	/**

	 * ABM control version.

	 */

	uint8_t version;



	/**

	 * Panel Control HW instance mask.

	 * Bit 0 is Panel Control HW instance 0.

	 * Bit 1 is Panel Control HW instance 1.

	 */

	uint8_t panel_mask;



	/**

	 * Explicit padding to 4 byte boundary.

	 */

	uint8_t pad[2];

};



/**
@@ -1728,6 +1762,23 @@ struct dmub_cmd_abm_set_pwm_frac_data { 
	 * TODO: Convert to uint8_t.

	 */

	uint32_t fractional_pwm;



	/**

	 * ABM control version.

	 */

	uint8_t version;



	/**

	 * Panel Control HW instance mask.

	 * Bit 0 is Panel Control HW instance 0.

	 * Bit 1 is Panel Control HW instance 1.

	 */

	uint8_t panel_mask;



	/**

	 * Explicit padding to 4 byte boundary.

	 */

	uint8_t pad[2];

};



/**
@@ -1758,6 +1809,24 @@ struct dmub_cmd_abm_init_config_data { 
	 * Indirect buffer length.

	 */

	uint16_t bytes;





	/**

	 * ABM control version.

	 */

	uint8_t version;



	/**

	 * Panel Control HW instance mask.

	 * Bit 0 is Panel Control HW instance 0.

	 * Bit 1 is Panel Control HW instance 1.

	 */

	uint8_t panel_mask;



	/**

	 * Explicit padding to 4 byte boundary.

	 */

	uint8_t pad[2];

};



/**