Commit 63cd992e authored by Stephen Boyd's avatar Stephen Boyd
Browse files

Merge tag 'qcom-clk-for-6.2' of...

Merge tag 'qcom-clk-for-6.2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into clk-qcom

Pull Qualcomm clk driver updates from Bjorn Andersson:

This introduces Global clock controller for SM8550, Display clock
controller for SC8280XP and RPMh clock controller for QDU1000 and
QRU1000.

The SM8150/SM8250 Display clock controller is cleaned up and some
missing clocks for SM8350 are added.

MSM8974 Global and Multimedia clock controllers are transitioned to
parent_data and parent_hws.

IPQ8074 parent_data and additional network resets and the Krait clock
controller modernized.

pm_runtime usage in SC7180 and SC7280 LPASS clock controllers are
corrected. SM8250 USB GDSCs enable retention mode.

RPM and RPMh clock drivers are cleaned up, to avoid duplicating clocks
which definition could be shared between platforms.

A variety of DT binding improvements.

* tag 'qcom-clk-for-6.2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (69 commits)
  clk: qcom: rpmh: add support for SM6350 rpmh IPA clock
  clk: qcom: mmcc-msm8974: use parent_hws/_data instead of parent_names
  clk: qcom: mmcc-msm8974: move clock parent tables down
  clk: qcom: mmcc-msm8974: use ARRAY_SIZE instead of specifying num_parents
  clk: qcom: gcc-msm8974: use parent_hws/_data instead of parent_names
  clk: qcom: gcc-msm8974: move clock parent tables down
  clk: qcom: gcc-msm8974: use ARRAY_SIZE instead of specifying num_parents
  dt-bindings: clocks: qcom,mmcc: define clocks/clock-names for MSM8974
  dt-bindings: clock: split qcom,gcc-msm8974,-msm8226 to the separate file
  clk: qcom: gcc-ipq4019: switch to devm_clk_notifier_register
  clk: qcom: rpmh: remove usage of platform name
  clk: qcom: rpmh: rename VRM clock data
  clk: qcom: rpmh: rename ARC clock data
  clk: qcom: rpmh: support separate symbol name for the RPMH clocks
  clk: qcom: rpmh: remove platform names from BCM clocks
  clk: qcom: rpmh: drop all _ao names
  clk: qcom: rpmh: reuse common duplicate clocks
  clk: qcom: rpmh: group clock definitions together
  clk: qcom: rpm: drop the platform from clock definitions
  clk: qcom: rpm: drop the _clk suffix completely
  ...
parents 9abf2313 2931aa67
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+1 −1
Original line number Diff line number Diff line
@@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/clock/qcom,a53pll.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Qualcomm A53 PLL Binding
title: Qualcomm A53 PLL clock

maintainers:
  - Bjorn Andersson <andersson@kernel.org>
+1 −1
Original line number Diff line number Diff line
@@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/clock/qcom,a7pll.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Qualcomm A7 PLL Binding
title: Qualcomm A7 PLL clock

maintainers:
  - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
+7 −4
Original line number Diff line number Diff line
@@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/clock/qcom,aoncc-sm8250.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Clock bindings for LPASS Always ON Clock Controller on SM8250 SoCs
title: LPASS Always ON Clock Controller on SM8250 SoCs

maintainers:
  - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
@@ -17,7 +17,7 @@ description: |

properties:
  compatible:
    const: qcom,sm8250-lpass-aon
    const: qcom,sm8250-lpass-aoncc

  reg:
    maxItems: 1
@@ -28,11 +28,13 @@ properties:
  clocks:
    items:
      - description: LPASS Core voting clock
      - description: LPASS Audio codec voting clock
      - description: Glitch Free Mux register clock

  clock-names:
    items:
      - const: core
      - const: audio
      - const: bus

required:
@@ -50,9 +52,10 @@ examples:
    #include <dt-bindings/sound/qcom,q6afe.h>
    clock-controller@3800000 {
      #clock-cells = <1>;
      compatible = "qcom,sm8250-lpass-aon";
      compatible = "qcom,sm8250-lpass-aoncc";
      reg = <0x03380000 0x40000>;
      clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
               <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
               <&q6afecc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
      clock-names = "core", "bus";
      clock-names = "core", "audio", "bus";
    };
+5 −2
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@@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/clock/qcom,audiocc-sm8250.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Clock bindings for LPASS Audio Clock Controller on SM8250 SoCs
title: LPASS Audio Clock Controller on SM8250 SoCs

maintainers:
  - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
@@ -28,11 +28,13 @@ properties:
  clocks:
    items:
      - description: LPASS Core voting clock
      - description: LPASS Audio codec voting clock
      - description: Glitch Free Mux register clock

  clock-names:
    items:
      - const: core
      - const: audio
      - const: bus

required:
@@ -53,6 +55,7 @@ examples:
      compatible = "qcom,sm8250-lpass-audiocc";
      reg = <0x03300000 0x30000>;
      clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
               <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
               <&q6afecc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
      clock-names = "core", "bus";
      clock-names = "core", "audio", "bus";
    };
+3 −3
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@@ -4,16 +4,16 @@
$id: http://devicetree.org/schemas/clock/qcom,camcc-sm8250.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Qualcomm Camera Clock & Reset Controller Binding for SM8250
title: Qualcomm Camera Clock & Reset Controller on SM8250

maintainers:
  - Jonathan Marek <jonathan@marek.ca>

description: |
  Qualcomm camera clock control module which supports the clocks, resets and
  Qualcomm camera clock control module provides the clocks, resets and
  power domains on SM8250.

  See also dt-bindings/clock/qcom,camcc-sm8250.h
  See also:: include/dt-bindings/clock/qcom,camcc-sm8250.h

properties:
  compatible:
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