Commit 63c30d70 authored by Miquel Raynal's avatar Miquel Raynal
Browse files

Merge tag 'nand/for-6.1' into mtd/next 



Raw NAND core changes:
* Replace of_gpio_named_count() by gpiod_count()
  - Remove misguided comment of nand_get_device()
  - bbt: Use the bitmap API to allocate bitmaps

Raw NAND controller drivers changes:
* Meson:
  - Stop supporting legacy clocks
  - Refine resource getting in probe
  - Convert bindings to yaml
  - Fix clock handling and update the bindings accordingly
  - Fix bit map use in meson_nfc_ecc_correct()
* bcm47xx:
  - Fix spelling typo in comment
* STM32 FMC2:
  - Switch to using devm_fwnode_gpiod_get()
  - Fix dma_map_sg error check
* Cadence:
  - Remove an unneeded result variable
* Marvell:
  - Fix error handle regarding dma_map_sg
* Orion:
  - Use devm_clk_get_optional()
* Cafe:
  - Use correct function name in comment block
* Atmel:
  - Unmap streaming DMA mappings
* Arasan:
  - Stop using 0 as NULL pointer
* GPMI:
  - Fix typo 'the the' in comment
* BRCM:
  - Add individual glue driver selection
  - Move Kconfig to driver folder
* FSL: Fix none ECC mode
* Intel:
  - Use devm_platform_ioremap_resource_byname()
  - Remove unused clk_rate member from struct ebu_nand
  - Remove unused nand_pa member from ebu_nand_cs
  - Don't re-define NAND_DATA_IFACE_CHECK_ONLY
  - Remove undocumented compatible string
  - Fix compatible string in the bindings
  - Read the chip-select line from the correct OF node
  - Fix maximum chip select value in the bindings

Signed-off-by: default avatarMiquel Raynal <miquel.raynal@bootlin.com>
parents 095bb6e4 ba47a6ac

Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt

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+0 −60
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Amlogic NAND Flash Controller (NFC) for GXBB/GXL/AXG family SoCs



This file documents the properties in addition to those available in

the MTD NAND bindings.



Required properties:

- compatible : contains one of:

  - "amlogic,meson-gxl-nfc"

  - "amlogic,meson-axg-nfc"

- clocks     :

	A list of phandle + clock-specifier pairs for the clocks listed

	in clock-names.



- clock-names: Should contain the following:

	"core" - NFC module gate clock

	"device" - device clock from eMMC sub clock controller

	"rx" - rx clock phase

	"tx" - tx clock phase



- amlogic,mmc-syscon	: Required for NAND clocks, it's shared with SD/eMMC

				controller port C



Optional children nodes:

Children nodes represent the available nand chips.



Other properties:

see Documentation/devicetree/bindings/mtd/nand-controller.yaml for generic bindings.



Example demonstrate on AXG SoC:



	sd_emmc_c_clkc: mmc@7000 {

		compatible = "amlogic,meson-axg-mmc-clkc", "syscon";

		reg = <0x0 0x7000 0x0 0x800>;

	};



	nand-controller@7800 {

		compatible = "amlogic,meson-axg-nfc";

		reg = <0x0 0x7800 0x0 0x100>;

		#address-cells = <1>;

		#size-cells = <0>;

		interrupts = <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>;



		clocks = <&clkc CLKID_SD_EMMC_C>,

			<&sd_emmc_c_clkc CLKID_MMC_DIV>,

			<&sd_emmc_c_clkc CLKID_MMC_PHASE_RX>,

			<&sd_emmc_c_clkc CLKID_MMC_PHASE_TX>;

		clock-names = "core", "device", "rx", "tx";

		amlogic,mmc-syscon = <&sd_emmc_c_clkc>;



		pinctrl-names = "default";

		pinctrl-0 = <&nand_pins>;



		nand@0 {

			reg = <0>;

			#address-cells = <1>;

			#size-cells = <1>;



			nand-on-flash-bbt;

		};

	};

Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/mtd/amlogic,meson-nand.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Amlogic NAND Flash Controller (NFC) for GXBB/GXL/AXG family SoCs



allOf:

  - $ref: nand-controller.yaml



maintainers:

  - liang.yang@amlogic.com



properties:

  compatible:

    enum:

      - amlogic,meson-gxl-nfc

      - amlogic,meson-axg-nfc



  reg:

    maxItems: 2



  reg-names:

    items:

      - const: nfc

      - const: emmc



  interrupts:

    maxItems: 1



  clocks:

    minItems: 2



  clock-names:

    items:

      - const: core

      - const: device



patternProperties:

  "^nand@[0-7]$":

    type: object

    properties:

      reg:

        minimum: 0

        maximum: 1



      nand-ecc-mode:

        const: hw



      nand-ecc-step-size:

        const: 1024



      nand-ecc-strength:

        enum: [8, 16, 24, 30, 40, 50, 60]

        description: |

          The ECC configurations that can be supported are as follows.

            meson-gxl-nfc 8, 16, 24, 30, 40, 50, 60

            meson-axg-nfc 8



required:

  - compatible

  - reg

  - interrupts

  - clocks

  - clock-names



unevaluatedProperties: false



examples:

  - |

    #include <dt-bindings/clock/axg-clkc.h>

    #include <dt-bindings/interrupt-controller/arm-gic.h>

    nand-controller@ffe07800 {

      compatible = "amlogic,meson-axg-nfc";

      reg = <0xffe07800 0x100>, <0xffe07000 0x800>;

      reg-names = "nfc", "emmc";

      interrupts = <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>;

      clocks = <&clkc CLKID_SD_EMMC_C>,  <&clkc CLKID_FCLK_DIV2>;

      clock-names = "core", "device";



      pinctrl-0 = <&nand_pins>;

      pinctrl-names = "default";



      #address-cells = <1>;

      #size-cells = <0>;



      nand@0 {

        reg = <0>;

      };

    };



...

Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml→Documentation/devicetree/bindings/mtd/intel,lgm-ebunand.yaml

+4 −4
Original line number Diff line number Diff line 
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/mtd/intel,lgm-nand.yaml#

$id: http://devicetree.org/schemas/mtd/intel,lgm-ebunand.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Intel LGM SoC NAND Controller Device Tree Bindings
@@ -14,7 +14,7 @@ maintainers: 


properties:

  compatible:

    const: intel,lgm-nand

    const: intel,lgm-ebunand



  reg:

    maxItems: 6
@@ -51,7 +51,7 @@ patternProperties: 
    properties:

      reg:

        minimum: 0

        maximum: 7

        maximum: 1



      nand-ecc-mode: true
@@ -75,7 +75,7 @@ additionalProperties: false 
examples:

  - |

    nand-controller@e0f00000 {

      compatible = "intel,lgm-nand";

      compatible = "intel,lgm-ebunand";

      reg = <0xe0f00000 0x100>,

            <0xe1000000 0x300>,

            <0xe1400000 0x8000>,

drivers/mtd/nand/bbt.c

+2 −5
Original line number Diff line number Diff line
@@ -24,11 +24,8 @@ int nanddev_bbt_init(struct nand_device *nand) 
{

	unsigned int bits_per_block = fls(NAND_BBT_BLOCK_NUM_STATUS);

	unsigned int nblocks = nanddev_neraseblocks(nand);

	unsigned int nwords = DIV_ROUND_UP(nblocks * bits_per_block,

					   BITS_PER_LONG);



	nand->bbt.cache = kcalloc(nwords, sizeof(*nand->bbt.cache),

				  GFP_KERNEL);

	nand->bbt.cache = bitmap_zalloc(nblocks * bits_per_block, GFP_KERNEL);

	if (!nand->bbt.cache)

		return -ENOMEM;
@@ -44,7 +41,7 @@ EXPORT_SYMBOL_GPL(nanddev_bbt_init); 
 */

void nanddev_bbt_cleanup(struct nand_device *nand)

{

	kfree(nand->bbt.cache);

	bitmap_free(nand->bbt.cache);

}

EXPORT_SYMBOL_GPL(nanddev_bbt_cleanup);

drivers/mtd/nand/raw/Kconfig

+2 −22
Original line number Diff line number Diff line
@@ -200,27 +200,7 @@ config MTD_NAND_TMIO 
	  Support for NAND flash connected to a Toshiba Mobile IO

	  Controller in some PDAs, including the Sharp SL6000x.



config MTD_NAND_BRCMNAND

	tristate "Broadcom STB NAND controller"

	depends on ARM || ARM64 || MIPS || COMPILE_TEST

	depends on HAS_IOMEM

	help

	  Enables the Broadcom NAND controller driver. The controller was

	  originally designed for Set-Top Box but is used on various BCM7xxx,

	  BCM3xxx, BCM63xxx, iProc/Cygnus and more.



if MTD_NAND_BRCMNAND



config MTD_NAND_BRCMNAND_BCMA

	tristate "Broadcom BCMA NAND controller"

	depends on BCMA_NFLASH

	depends on BCMA

	help

	  Enables the BRCMNAND controller over BCMA on BCM47186/BCM5358 SoCs.

	  The glue driver will take care of performing the low-level I/O

	  operations to interface the BRCMNAND controller over the BCMA bus.



endif # MTD_NAND_BRCMNAND

source "drivers/mtd/nand/raw/brcmnand/Kconfig"



config MTD_NAND_BCM47XXNFLASH

	tristate "BCM4706 BCMA NAND controller"
@@ -410,7 +390,7 @@ config MTD_NAND_STM32_FMC2 


config MTD_NAND_MESON

	tristate "Support for NAND controller on Amlogic's Meson SoCs"

	depends on ARCH_MESON || COMPILE_TEST

	depends on COMMON_CLK && (ARCH_MESON || COMPILE_TEST)

	select MFD_SYSCON

	help

	  Enables support for NAND controller on Amlogic's Meson SoCs.