Commit 63b5fa9d authored by Yang Wang's avatar Yang Wang Committed by Alex Deucher
Browse files

drm/amdgpu: fix gmc init fail in sriov mode 



"adev->gfx.rlc.rlcg_reg_access_supported = true;"
the above varible were set too late during driver initialization.
it will cause the driver to fail to write/read register during GMC hw init
in sriov mode.

move gfx_xxx_init_rlcg_reg_access_ctrl() function to gfx early init stage
to avoid this issue.

Fixes: 5d447e29 ("drm/amdgpu: add helper for rlcg indirect reg access")

Signed-off-by: default avatarYang Wang <KevinYang.Wang@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 3b99e8e3

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

+3 −1
Original line number Diff line number Diff line
@@ -4343,7 +4343,6 @@ static int gfx_v10_0_rlc_init(struct amdgpu_device *adev) 
	if (adev->gfx.rlc.funcs->update_spm_vmid)

		adev->gfx.rlc.funcs->update_spm_vmid(adev, 0xf);



	gfx_v10_0_init_rlcg_reg_access_ctrl(adev);



	return 0;

}
@@ -7682,6 +7681,9 @@ static int gfx_v10_0_early_init(void *handle) 
	gfx_v10_0_set_gds_init(adev);

	gfx_v10_0_set_rlc_funcs(adev);



	/* init rlcg reg access ctrl */

	gfx_v10_0_init_rlcg_reg_access_ctrl(adev);



	return 0;

}

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

+3 −3
Original line number Diff line number Diff line
@@ -1934,9 +1934,6 @@ static int gfx_v9_0_rlc_init(struct amdgpu_device *adev) 
	if (adev->gfx.rlc.funcs->update_spm_vmid)

		adev->gfx.rlc.funcs->update_spm_vmid(adev, 0xf);



	/* init rlcg reg access ctrl */

	gfx_v9_0_init_rlcg_reg_access_ctrl(adev);



	return 0;

}
@@ -4755,6 +4752,9 @@ static int gfx_v9_0_early_init(void *handle) 
	gfx_v9_0_set_gds_init(adev);

	gfx_v9_0_set_rlc_funcs(adev);



	/* init rlcg reg access ctrl */

	gfx_v9_0_init_rlcg_reg_access_ctrl(adev);



	return 0;

}