Commit 630168a9 authored by Wenjing Liu's avatar Wenjing Liu Committed by Alex Deucher
Browse files

drm/amd/display: move dp link training logic to link_dp_training 



[why]
Extract dp link training logic out to their own files.
link_dp_training - high level training sequence and helper functions.
link_dp_training_8b_10b - dp1.x training
link_dp_training_auxless - aux-less training
link_dp_traininig_dpia - dpia training
link_dp_training_fixed_vs_pe_retimer - fixed vs pe retimer training
link_dp_training_128b_132b - dp2.1 training

Tested-by: default avatarDaniel Wheeler <Daniel.Wheeler@amd.com>
Reviewed-by: default avatarWesley Chalmers <Wesley.Chalmers@amd.com>
Acked-by: default avatarRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: default avatarWenjing Liu <wenjing.liu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 899dd5b8

drivers/gpu/drm/amd/display/dc/core/dc_link.c

+1 −0
Original line number Diff line number Diff line
@@ -54,6 +54,7 @@ 
#include "link/link_dpcd.h"

#include "link/link_dp_trace.h"

#include "link/link_hpd.h"

#include "link/link_dp_training.h"



#include "dc/dcn30/dcn30_vpg.h"

drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c

+134 −3103

File changed.

Preview size limit exceeded, changes collapsed.

drivers/gpu/drm/amd/display/dc/dc_dp_types.h

+3 −0
Original line number Diff line number Diff line
@@ -975,6 +975,9 @@ struct dpcd_usb4_dp_tunneling_info { 
/* TODO - Use DRM header to replace above once available */

#endif // DP_INTRA_HOP_AUX_REPLY_INDICATION



#ifndef DP_REPEATER_CONFIGURATION_AND_STATUS_SIZE

#define DP_REPEATER_CONFIGURATION_AND_STATUS_SIZE	0x50

#endif

union dp_main_line_channel_coding_cap {

	struct {

		uint8_t DP_8b_10b_SUPPORTED	:1;

drivers/gpu/drm/amd/display/dc/dc_link.h

+3 −21
Original line number Diff line number Diff line
@@ -459,27 +459,6 @@ void dc_link_dp_set_drive_settings( 
	const struct link_resource *link_res,

	struct link_training_settings *lt_settings);



bool dc_link_dp_perform_link_training_skip_aux(

	struct dc_link *link,

	const struct link_resource *link_res,

	const struct dc_link_settings *link_setting);



enum link_training_result dc_link_dp_perform_link_training(

	struct dc_link *link,

	const struct link_resource *link_res,

	const struct dc_link_settings *link_settings,

	bool skip_video_pattern);



bool dc_link_dp_sync_lt_begin(struct dc_link *link);



enum link_training_result dc_link_dp_sync_lt_attempt(

	struct dc_link *link,

	const struct link_resource *link_res,

	struct dc_link_settings *link_setting,

	struct dc_link_training_overrides *lt_settings);



bool dc_link_dp_sync_lt_end(struct dc_link *link, bool link_down);



bool dc_link_dp_set_test_pattern(

	struct dc_link *link,

	enum dp_test_pattern test_pattern,
@@ -601,4 +580,7 @@ bool reset_cur_dp_mst_topology(struct dc_link *link); 
int dc_link_aux_transfer_raw(struct ddc_service *ddc,

		struct aux_payload *payload,

		enum aux_return_code_type *operation_result);



enum lttpr_mode dc_link_decide_lttpr_mode(struct dc_link *link,

		struct dc_link_settings *link_setting);

#endif /* DC_LINK_H_ */

drivers/gpu/drm/amd/display/dc/inc/dc_link_dp.h

+9 −105
Original line number Diff line number Diff line
@@ -31,7 +31,6 @@ 
#define LINK_AUX_DEFAULT_LTTPR_TIMEOUT_PERIOD 3200 /*us*/

#define LINK_AUX_DEFAULT_TIMEOUT_PERIOD 552 /*us*/

#define MAX_MTP_SLOT_COUNT 64

#define DP_REPEATER_CONFIGURATION_AND_STATUS_SIZE 0x50

#define TRAINING_AUX_RD_INTERVAL 100 //us

#define LINK_AUX_WAKE_TIMEOUT_MS 1500 // Timeout when trying to wake unresponsive DPRX.
@@ -40,11 +39,6 @@ struct dc_stream_state; 
struct dc_link_settings;



enum {

	LINK_TRAINING_MAX_RETRY_COUNT = 5,

	/* to avoid infinite loop where-in the receiver

	 * switches between different VS

	 */

	LINK_TRAINING_MAX_CR_RETRY = 100,

	/*

	 * Some receivers fail to train on first try and are good

	 * on subsequent tries. 2 retries should be plenty. If we
@@ -74,16 +68,7 @@ bool decide_link_settings( 
	struct dc_stream_state *stream,

	struct dc_link_settings *link_setting);



bool perform_link_training_with_retries(

	const struct dc_link_settings *link_setting,

	bool skip_video_pattern,

	int attempts,

	struct pipe_ctx *pipe_ctx,

	enum signal_type signal,

	bool do_fallback);



bool hpd_rx_irq_check_link_loss_status(

	struct dc_link *link,

bool hpd_rx_irq_check_link_loss_status(struct dc_link *link,

				       union hpd_irq_data *hpd_irq_dpcd_data);



bool is_mst_supported(struct dc_link *link);
@@ -109,63 +94,6 @@ void dpcd_set_source_specific_data(struct dc_link *link); 


void dpcd_write_cable_id_to_dprx(struct dc_link *link);



/* Write DPCD link configuration data. */

enum dc_status dpcd_set_link_settings(

	struct dc_link *link,

	const struct link_training_settings *lt_settings);

/* Write DPCD drive settings. */

enum dc_status dpcd_set_lane_settings(

	struct dc_link *link,

	const struct link_training_settings *link_training_setting,

	uint32_t offset);

/* Read training status and adjustment requests from DPCD. */

enum dc_status dp_get_lane_status_and_lane_adjust(

	struct dc_link *link,

	const struct link_training_settings *link_training_setting,

	union lane_status ln_status[LANE_COUNT_DP_MAX],

	union lane_align_status_updated *ln_align,

	union lane_adjust ln_adjust[LANE_COUNT_DP_MAX],

	uint32_t offset);



void dp_wait_for_training_aux_rd_interval(

	struct dc_link *link,

	uint32_t wait_in_micro_secs);



bool dp_is_cr_done(enum dc_lane_count ln_count,

	union lane_status *dpcd_lane_status);



enum link_training_result dp_get_cr_failure(enum dc_lane_count ln_count,

	union lane_status *dpcd_lane_status);



bool dp_is_ch_eq_done(enum dc_lane_count ln_count,

	union lane_status *dpcd_lane_status);

bool dp_is_symbol_locked(enum dc_lane_count ln_count,

	union lane_status *dpcd_lane_status);

bool dp_is_interlane_aligned(union lane_align_status_updated align_status);



bool dp_is_max_vs_reached(

	const struct link_training_settings *lt_settings);

void dp_hw_to_dpcd_lane_settings(

	const struct link_training_settings *lt_settings,

	const struct dc_lane_settings hw_lane_settings[LANE_COUNT_DP_MAX],

	union dpcd_training_lane dpcd_lane_settings[]);

void dp_decide_lane_settings(

	const struct link_training_settings *lt_settings,

	const union lane_adjust ln_adjust[LANE_COUNT_DP_MAX],

	struct dc_lane_settings hw_lane_settings[LANE_COUNT_DP_MAX],

	union dpcd_training_lane dpcd_lane_settings[]);



uint32_t dp_translate_training_aux_read_interval(uint32_t dpcd_aux_read_interval);



enum dpcd_training_patterns

	dc_dp_training_pattern_to_dpcd_training_pattern(

	struct dc_link *link,

	enum dc_dp_training_pattern pattern);



uint8_t dc_dp_initialize_scrambling_data_symbols(

	struct dc_link *link,

	enum dc_dp_training_pattern pattern);



enum dc_status dp_set_fec_ready(struct dc_link *link, const struct link_resource *link_res, bool ready);

void dp_set_fec_enable(struct dc_link *link, bool enable);

bool dp_set_dsc_enable(struct pipe_ctx *pipe_ctx, bool enable);
@@ -183,32 +111,15 @@ void dp_decide_training_settings( 
/* Convert PHY repeater count read from DPCD uint8_t. */

uint8_t dp_convert_to_count(uint8_t lttpr_repeater_count);



/* Check DPCD training status registers to detect link loss. */

enum link_training_result dp_check_link_loss_status(

		struct dc_link *link,

		const struct link_training_settings *link_training_setting);



enum dc_status dpcd_configure_lttpr_mode(

		struct dc_link *link,

		struct link_training_settings *lt_settings);



enum dp_link_encoding dp_get_link_encoding_format(const struct dc_link_settings *link_settings);

enum dc_status dp_retrieve_lttpr_cap(struct dc_link *link);

bool dp_is_lttpr_present(struct dc_link *link);

enum lttpr_mode dp_decide_lttpr_mode(struct dc_link *link, struct dc_link_settings *link_setting);

void dp_get_lttpr_mode_override(struct dc_link *link, enum lttpr_mode *override);

enum lttpr_mode dp_decide_8b_10b_lttpr_mode(struct dc_link *link);

enum lttpr_mode dp_decide_128b_132b_lttpr_mode(struct dc_link *link);

bool dpcd_write_128b_132b_sst_payload_allocation_table(

		const struct dc_stream_state *stream,

		struct dc_link *link,

		struct link_mst_stream_allocation_table *proposed_table,

		bool allocate);



enum dc_status dpcd_configure_channel_coding(

		struct dc_link *link,

		struct link_training_settings *lt_settings);



bool dpcd_poll_for_allocation_change_trigger(struct dc_link *link);



struct fixed31_32 calculate_sst_avg_time_slots_per_mtp(
@@ -220,7 +131,6 @@ void enable_dp_hpo_output(struct dc_link *link, 
void disable_dp_hpo_output(struct dc_link *link,

		const struct link_resource *link_res,

		enum signal_type signal);



void setup_dp_hpo_stream(struct pipe_ctx *pipe_ctx, bool enable);

bool is_dp_128b_132b_signal(struct pipe_ctx *pipe_ctx);

void edp_panel_backlight_power_on(struct dc_link *link, bool wait_for_hpd);
@@ -242,26 +152,20 @@ void dp_disable_link_phy(struct dc_link *link, const struct link_resource *link_ 
void dp_disable_link_phy_mst(struct dc_link *link, const struct link_resource *link_res,

		enum signal_type signal);



bool dp_set_hw_training_pattern(

		struct dc_link *link,

		const struct link_resource *link_res,

		enum dc_dp_training_pattern pattern,

		uint32_t offset);



void dp_set_hw_lane_settings(

		struct dc_link *link,

		const struct link_resource *link_res,

		const struct link_training_settings *link_settings,

		uint32_t offset);



void dp_set_hw_test_pattern(

		struct dc_link *link,

		const struct link_resource *link_res,

		enum dp_test_pattern test_pattern,

		uint8_t *custom_pattern,

		uint32_t custom_pattern_size);



void dp_retrain_link_dp_test(struct dc_link *link,

		struct dc_link_settings *link_setting,

		bool skip_video_pattern);



bool decide_fallback_link_setting(

		struct dc_link *link,

		struct dc_link_settings *max,

		struct dc_link_settings *cur,

		enum link_training_result training_result);



#endif /* __DC_LINK_DP_H__ */