Commit 62f0d7dc authored by Nava kishore Manne's avatar Nava kishore Manne Committed by Michal Simek
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reset: reset-zynqmp: Adding support for Xilinx zynqmp reset controller. 



Add a reset controller driver for Xilinx Zynq UltraScale+ MPSoC.
The zynqmp reset-controller has the ability to reset lines
connected to different blocks and peripheral in the Soc.

Signed-off-by: default avatarNava kishore Manne <nava.manne@xilinx.com>
Acked-by: default avatarPhilipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: default avatarMichal Simek <michal.simek@xilinx.com>
parent 3f1b66be

drivers/reset/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -25,4 +25,5 @@ obj-$(CONFIG_RESET_TI_SYSCON) += reset-ti-syscon.o 
obj-$(CONFIG_RESET_UNIPHIER) += reset-uniphier.o

obj-$(CONFIG_RESET_UNIPHIER_USB3) += reset-uniphier-usb3.o

obj-$(CONFIG_RESET_ZYNQ) += reset-zynq.o

obj-$(CONFIG_ARCH_ZYNQMP) += reset-zynqmp.o

drivers/reset/reset-zynqmp.c

0 → 100644
+114 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0+

/*

 * Copyright (C) 2018 Xilinx, Inc.

 *

 */



#include <linux/err.h>

#include <linux/of.h>

#include <linux/platform_device.h>

#include <linux/reset-controller.h>

#include <linux/firmware/xlnx-zynqmp.h>



#define ZYNQMP_NR_RESETS (ZYNQMP_PM_RESET_END - ZYNQMP_PM_RESET_START)

#define ZYNQMP_RESET_ID ZYNQMP_PM_RESET_START



struct zynqmp_reset_data {

	struct reset_controller_dev rcdev;

	const struct zynqmp_eemi_ops *eemi_ops;

};



static inline struct zynqmp_reset_data *

to_zynqmp_reset_data(struct reset_controller_dev *rcdev)

{

	return container_of(rcdev, struct zynqmp_reset_data, rcdev);

}



static int zynqmp_reset_assert(struct reset_controller_dev *rcdev,

			       unsigned long id)

{

	struct zynqmp_reset_data *priv = to_zynqmp_reset_data(rcdev);



	return priv->eemi_ops->reset_assert(ZYNQMP_RESET_ID + id,

					    PM_RESET_ACTION_ASSERT);

}



static int zynqmp_reset_deassert(struct reset_controller_dev *rcdev,

				 unsigned long id)

{

	struct zynqmp_reset_data *priv = to_zynqmp_reset_data(rcdev);



	return priv->eemi_ops->reset_assert(ZYNQMP_RESET_ID + id,

					    PM_RESET_ACTION_RELEASE);

}



static int zynqmp_reset_status(struct reset_controller_dev *rcdev,

			       unsigned long id)

{

	struct zynqmp_reset_data *priv = to_zynqmp_reset_data(rcdev);

	int val, err;



	err = priv->eemi_ops->reset_get_status(ZYNQMP_RESET_ID + id, &val);

	if (err)

		return err;



	return val;

}



static int zynqmp_reset_reset(struct reset_controller_dev *rcdev,

			      unsigned long id)

{

	struct zynqmp_reset_data *priv = to_zynqmp_reset_data(rcdev);



	return priv->eemi_ops->reset_assert(ZYNQMP_RESET_ID + id,

					    PM_RESET_ACTION_PULSE);

}



static struct reset_control_ops zynqmp_reset_ops = {

	.reset = zynqmp_reset_reset,

	.assert = zynqmp_reset_assert,

	.deassert = zynqmp_reset_deassert,

	.status = zynqmp_reset_status,

};



static int zynqmp_reset_probe(struct platform_device *pdev)

{

	struct zynqmp_reset_data *priv;



	priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);

	if (!priv)

		return -ENOMEM;



	platform_set_drvdata(pdev, priv);



	priv->eemi_ops = zynqmp_pm_get_eemi_ops();

	if (!priv->eemi_ops)

		return -ENXIO;



	priv->rcdev.ops = &zynqmp_reset_ops;

	priv->rcdev.owner = THIS_MODULE;

	priv->rcdev.of_node = pdev->dev.of_node;

	priv->rcdev.nr_resets = ZYNQMP_NR_RESETS;



	return devm_reset_controller_register(&pdev->dev, &priv->rcdev);

}



static const struct of_device_id zynqmp_reset_dt_ids[] = {

	{ .compatible = "xlnx,zynqmp-reset", },

	{ /* sentinel */ },

};



static struct platform_driver zynqmp_reset_driver = {

	.probe	= zynqmp_reset_probe,

	.driver = {

		.name		= KBUILD_MODNAME,

		.of_match_table	= zynqmp_reset_dt_ids,

	},

};



static int __init zynqmp_reset_init(void)

{

	return platform_driver_register(&zynqmp_reset_driver);

}



arch_initcall(zynqmp_reset_init);