Commit 627d8586 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'loongarch-fixes-6.4-1' of... 

Merge tag 'loongarch-fixes-6.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson

Pull LoongArch fixes from Huacai Chen:
 "Some trivial bug fixes for v6.4-rc7"

* tag 'loongarch-fixes-6.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson:
  LoongArch: Fix debugfs_create_dir() error checking
  LoongArch: Avoid uninitialized alignment_mask
  LoongArch: Fix perf event id calculation
  LoongArch: Fix the write_fcsr() macro
  LoongArch: Let pmd_present() return true when splitting pmd
parents 0e306952 41efbb68

arch/loongarch/include/asm/loongarch.h

+1 −1
Original line number Diff line number Diff line
@@ -1496,7 +1496,7 @@ __BUILD_CSR_OP(tlbidx) 
#define write_fcsr(dest, val) \

do {	\

	__asm__ __volatile__(	\

	"	movgr2fcsr	%0, "__stringify(dest)"	\n"	\

	"	movgr2fcsr	"__stringify(dest)", %0	\n"	\

	: : "r" (val));	\

} while (0)

arch/loongarch/include/asm/pgtable-bits.h

+2 −0
Original line number Diff line number Diff line
@@ -22,12 +22,14 @@ 
#define	_PAGE_PFN_SHIFT		12

#define	_PAGE_SWP_EXCLUSIVE_SHIFT 23

#define	_PAGE_PFN_END_SHIFT	48

#define	_PAGE_PRESENT_INVALID_SHIFT 60

#define	_PAGE_NO_READ_SHIFT	61

#define	_PAGE_NO_EXEC_SHIFT	62

#define	_PAGE_RPLV_SHIFT	63



/* Used by software */

#define _PAGE_PRESENT		(_ULCAST_(1) << _PAGE_PRESENT_SHIFT)

#define _PAGE_PRESENT_INVALID	(_ULCAST_(1) << _PAGE_PRESENT_INVALID_SHIFT)

#define _PAGE_WRITE		(_ULCAST_(1) << _PAGE_WRITE_SHIFT)

#define _PAGE_ACCESSED		(_ULCAST_(1) << _PAGE_ACCESSED_SHIFT)

#define _PAGE_MODIFIED		(_ULCAST_(1) << _PAGE_MODIFIED_SHIFT)

arch/loongarch/include/asm/pgtable.h

+2 −1
Original line number Diff line number Diff line
@@ -213,7 +213,7 @@ static inline int pmd_bad(pmd_t pmd) 
static inline int pmd_present(pmd_t pmd)

{

	if (unlikely(pmd_val(pmd) & _PAGE_HUGE))

		return !!(pmd_val(pmd) & (_PAGE_PRESENT | _PAGE_PROTNONE));

		return !!(pmd_val(pmd) & (_PAGE_PRESENT | _PAGE_PROTNONE | _PAGE_PRESENT_INVALID));



	return pmd_val(pmd) != (unsigned long)invalid_pte_table;

}
@@ -558,6 +558,7 @@ static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot) 


static inline pmd_t pmd_mkinvalid(pmd_t pmd)

{

	pmd_val(pmd) |= _PAGE_PRESENT_INVALID;

	pmd_val(pmd) &= ~(_PAGE_PRESENT | _PAGE_VALID | _PAGE_DIRTY | _PAGE_PROTNONE);



	return pmd;

arch/loongarch/kernel/hw_breakpoint.c

+2 −0
Original line number Diff line number Diff line
@@ -396,6 +396,8 @@ int hw_breakpoint_arch_parse(struct perf_event *bp, 


	if (hw->ctrl.type != LOONGARCH_BREAKPOINT_EXECUTE)

		alignment_mask = 0x7;

	else

		alignment_mask = 0x3;

	offset = hw->address & alignment_mask;



	hw->address &= ~alignment_mask;

arch/loongarch/kernel/perf_event.c

+3 −3
Original line number Diff line number Diff line
@@ -271,7 +271,7 @@ static void loongarch_pmu_enable_event(struct hw_perf_event *evt, int idx) 
	WARN_ON(idx < 0 || idx >= loongarch_pmu.num_counters);



	/* Make sure interrupt enabled. */

	cpuc->saved_ctrl[idx] = M_PERFCTL_EVENT(evt->event_base & 0xff) |

	cpuc->saved_ctrl[idx] = M_PERFCTL_EVENT(evt->event_base) |

		(evt->config_base & M_PERFCTL_CONFIG_MASK) | CSR_PERFCTRL_IE;



	cpu = (event->cpu >= 0) ? event->cpu : smp_processor_id();
@@ -594,7 +594,7 @@ static struct pmu pmu = { 


static unsigned int loongarch_pmu_perf_event_encode(const struct loongarch_perf_event *pev)

{

	return (pev->event_id & 0xff);

	return M_PERFCTL_EVENT(pev->event_id);

}



static const struct loongarch_perf_event *loongarch_pmu_map_general_event(int idx)
@@ -849,7 +849,7 @@ static void resume_local_counters(void) 


static const struct loongarch_perf_event *loongarch_pmu_map_raw_event(u64 config)

{

	raw_event.event_id = config & 0xff;

	raw_event.event_id = M_PERFCTL_EVENT(config);



	return &raw_event;

}