Commit 6276d669 authored by Frank Li's avatar Frank Li Committed by Shawn Guo
Browse files

arm64: dts: imx8dxl: add flexspi0 support



Add flexspi0 node at common lsio subsystem.
Change flexspi0 irq number for imx8dxl.

Signed-off-by: default avatarFrank Li <Frank.Li@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 7772c29d
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+16 −1
Original line number Diff line number Diff line
@@ -11,7 +11,8 @@ lsio_subsys: bus@5d000000 {
	compatible = "simple-bus";
	#address-cells = <1>;
	#size-cells = <1>;
	ranges = <0x5d000000 0x0 0x5d000000 0x1000000>;
	ranges = <0x5d000000 0x0 0x5d000000 0x1000000>,
		 <0x08000000 0x0 0x08000000 0x10000000>;

	lsio_mem_clk: clock-lsio-mem {
		compatible = "fixed-clock";
@@ -107,6 +108,20 @@ lsio_subsys: bus@5d000000 {
		power-domains = <&pd IMX_SC_R_GPIO_7>;
	};

	flexspi0: spi@5d120000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "nxp,imx8qxp-fspi";
		reg = <0x5d120000 0x10000>, <0x08000000 0x10000000>;
		reg-names = "fspi_base", "fspi_mmap";
		interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&clk IMX_SC_R_FSPI_0 IMX_SC_PM_CLK_PER>,
			 <&clk IMX_SC_R_FSPI_0 IMX_SC_PM_CLK_PER>;
		clock-names = "fspi", "fspi_en";
		power-domains = <&pd IMX_SC_R_FSPI_0>;
		status = "disabled";
	};

	lsio_mu0: mailbox@5d1b0000 {
		reg = <0x5d1b0000 0x10000>;
		interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
+5 −0
Original line number Diff line number Diff line
@@ -3,6 +3,11 @@
 * Copyright 2019~2020, 2022 NXP
 */

&flexspi0 {
	compatible = "nxp,imx8dxl-fspi";
	interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
};

&lsio_gpio0 {
	compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio";
	interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;