Commit 627632dc authored by Herve Codina's avatar Herve Codina Committed by Geert Uytterhoeven
Browse files

ARM: dts: r9a06g032: Add internal PCI bridge node 



Add the device node for the r9a06g032 internal PCI bridge device.

Signed-off-by: default avatarHerve Codina <herve.codina@bootlin.com>
Link: https://lore.kernel.org/r/20220429134143.628428-6-herve.codina@bootlin.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent d8ff11cd

arch/arm/boot/dts/r9a06g032.dtsi

+29 −0
Original line number Diff line number Diff line
@@ -117,6 +117,35 @@ 
			};

		};



		pci_usb: pci@40030000 {

			compatible = "renesas,pci-r9a06g032", "renesas,pci-rzn1";

			device_type = "pci";

			clocks = <&sysctrl R9A06G032_HCLK_USBH>,

				 <&sysctrl R9A06G032_HCLK_USBPM>,

				 <&sysctrl R9A06G032_CLK_PCI_USB>;

			clock-names = "hclkh", "hclkpm", "pciclk";

			power-domains = <&sysctrl>;

			reg = <0x40030000 0xc00>,

			      <0x40020000 0x1100>;

			interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;

			status = "disabled";



			bus-range = <0 0>;

			#address-cells = <3>;

			#size-cells = <2>;

			#interrupt-cells = <1>;

			ranges = <0x02000000 0 0x40020000 0x40020000 0 0x00010000>;

			/* Should map all possible DDR as inbound ranges, but

			 * the IP only supports a 256MB, 512MB, or 1GB window.

			 * flags, PCI addr (64-bit), CPU addr, PCI size (64-bit)

			 */

			dma-ranges = <0x42000000 0 0x80000000 0x80000000 0 0x40000000>;

			interrupt-map-mask = <0xf800 0 0 0x7>;

			interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH

					 0x0800 0 0 1 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH

					 0x1000 0 0 2 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;

		};



		uart0: serial@40060000 {

			compatible = "renesas,r9a06g032-uart", "renesas,rzn1-uart", "snps,dw-apb-uart";

			reg = <0x40060000 0x400>;