Commit 6159c49e authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull crypto updates from Herbert Xu:
 "Algorithms:

   - Fix rmmod crash with x86/curve25519

   - Add ECDH NIST P384

   - Generate assembly files at build-time with perl scripts on arm

   - Switch to HMAC SHA512 DRBG as default DRBG

  Drivers:

   - Add sl3516 crypto engine

   - Add ECDH NIST P384 support in hisilicon/hpre

   - Add {ofb,cfb,ctr} over {aes,sm4} in hisilicon/sec

   - Add {ccm,gcm} over {aes,sm4} in hisilicon/sec

   - Enable omap hwrng driver for TI K3 family

   - Add support for AEAD algorithms in qce"

* 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (142 commits)
  crypto: sl3516 - depends on HAS_IOMEM
  crypto: hisilicon/qm - implement for querying hardware tasks status.
  crypto: sl3516 - Fix build warning without CONFIG_PM
  MAINTAINERS: update caam crypto driver maintainers list
  crypto: nx - Fix numerous sparse byte-order warnings
  crypto: nx - Fix RCU warning in nx842_OF_upd_status
  crypto: api - Move crypto attr definitions out of crypto.h
  crypto: nx - Fix memcpy() over-reading in nonce
  crypto: hisilicon/sec - Fix spelling mistake "fallbcak" -> "fallback"
  crypto: sa2ul - Remove unused auth_len variable
  crypto: sl3516 - fix duplicated inclusion
  crypto: hisilicon/zip - adds the max shaper type rate
  crypto: hisilicon/hpre - adds the max shaper type rate
  crypto: hisilicon/sec - adds the max shaper type rate
  crypto: hisilicon/qm - supports to inquiry each function's QoS
  crypto: hisilicon/qm - add pf ping single vf function
  crypto: hisilicon/qm - merges the work initialization process into a single function
  crypto: hisilicon/qm - add the "alg_qos" file node
  crypto: hisilicon/qm - supports writing QoS int the host
  crypto: api - remove CRYPTOA_U32 and related functions
  ...
parents 31e798fd 9f38b678
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/crypto/cortina,sl3516-crypto.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: SL3516 cryptographic offloader driver

maintainers:
  - Corentin Labbe <clabbe@baylibre.com>

properties:
  compatible:
    enum:
      - cortina,sl3516-crypto

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  clocks:
    maxItems: 1

  resets:
    maxItems: 1

required:
  - compatible
  - reg
  - interrupts
  - clocks
  - resets

additionalProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/irq.h>
    #include <dt-bindings/clock/cortina,gemini-clock.h>
    #include <dt-bindings/reset/cortina,gemini-reset.h>

    crypto@62000000 {
        compatible = "cortina,sl3516-crypto";
        reg = <0x62000000 0x10000>;
        interrupts = <7 IRQ_TYPE_EDGE_RISING>;
        resets = <&syscon GEMINI_RESET_SECURITY>;
        clocks = <&syscon GEMINI_CLK_GATE_SECURITY>;
    };
+47 −0
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
# Copyright 2018 Linaro Ltd.
%YAML 1.2
---
$id: "http://devicetree.org/schemas/crypto/intel,ixp4xx-crypto.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"

title: Intel IXP4xx cryptographic engine

maintainers:
  - Linus Walleij <linus.walleij@linaro.org>

description: |
  The Intel IXP4xx cryptographic engine makes use of the IXP4xx NPE
  (Network Processing Engine). Since it is not a device on its own
  it is defined as a subnode of the NPE, if crypto support is
  available on the platform.

properties:
  compatible:
    const: intel,ixp4xx-crypto

  intel,npe-handle:
    $ref: '/schemas/types.yaml#/definitions/phandle-array'
    maxItems: 1
    description: phandle to the NPE this crypto engine is using, the cell
      describing the NPE instance to be used.

  queue-rx:
    $ref: /schemas/types.yaml#/definitions/phandle-array
    maxItems: 1
    description: phandle to the RX queue on the NPE, the cell describing
      the queue instance to be used.

  queue-txready:
    $ref: /schemas/types.yaml#/definitions/phandle-array
    maxItems: 1
    description: phandle to the TX READY queue on the NPE, the cell describing
      the queue instance to be used.

required:
  - compatible
  - intel,npe-handle
  - queue-rx
  - queue-txready

additionalProperties: false
+18 −4
Original line number Diff line number Diff line
@@ -26,9 +26,16 @@ properties:

  reg:
    items:
      - description: NPE0 register range
      - description: NPE1 register range
      - description: NPE2 register range
      - description: NPE0 (NPE-A) register range
      - description: NPE1 (NPE-B) register range
      - description: NPE2 (NPE-C) register range

  crypto:
    $ref: /schemas/crypto/intel,ixp4xx-crypto.yaml#
    type: object
    description: Optional node for the embedded crypto engine, the node
      should be named with the instance number of the NPE engine used for
      the crypto engine.

required:
  - compatible
@@ -38,8 +45,15 @@ additionalProperties: false

examples:
  - |
    npe@c8006000 {
    npe: npe@c8006000 {
         compatible = "intel,ixp4xx-network-processing-engine";
         reg = <0xc8006000 0x1000>, <0xc8007000 0x1000>, <0xc8008000 0x1000>;

         crypto {
             compatible = "intel,ixp4xx-crypto";
             intel,npe-handle = <&npe 2>;
             queue-rx = <&qmgr 30>;
             queue-txready = <&qmgr 29>;
         };
    };
...
+22 −1
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@@ -1811,6 +1811,7 @@ F: Documentation/devicetree/bindings/net/cortina,gemini-ethernet.txt
F:	Documentation/devicetree/bindings/pinctrl/cortina,gemini-pinctrl.txt
F:	Documentation/devicetree/bindings/rtc/faraday,ftrtc010.txt
F:	arch/arm/mach-gemini/
F:	drivers/crypto/gemini/
F:	drivers/net/ethernet/cortina/
F:	drivers/pinctrl/pinctrl-gemini.c
F:	drivers/rtc/rtc-ftrtc010.c
@@ -1972,6 +1973,7 @@ F: Documentation/devicetree/bindings/interrupt-controller/intel,ixp4xx-interrupt
F:	Documentation/devicetree/bindings/timer/intel,ixp4xx-timer.yaml
F:	arch/arm/mach-ixp4xx/
F:	drivers/clocksource/timer-ixp4xx.c
F:	drivers/crypto/ixp4xx_crypto.c
F:	drivers/gpio/gpio-ixp4xx.c
F:	drivers/irqchip/irq-ixp4xx.c
F:	include/linux/irqchip/irq-ixp4xx.h
@@ -7179,7 +7181,7 @@ F: include/video/
FREESCALE CAAM (Cryptographic Acceleration and Assurance Module) DRIVER
M:	Horia Geantă <horia.geanta@nxp.com>
M:	Aymen Sghaier <aymen.sghaier@nxp.com>
M:	Pankaj Gupta <pankaj.gupta@nxp.com>
L:	linux-crypto@vger.kernel.org
S:	Maintained
F:	Documentation/devicetree/bindings/crypto/fsl-sec4.txt
@@ -7569,6 +7571,12 @@ M: Kieran Bingham <kbingham@kernel.org>
S:	Supported
F:	scripts/gdb/
GEMINI CRYPTO DRIVER
M:	Corentin Labbe <clabbe@baylibre.com>
L:	linux-crypto@vger.kernel.org
S:	Maintained
F:	drivers/crypto/gemini/
GEMTEK FM RADIO RECEIVER DRIVER
M:	Hans Verkuil <hverkuil@xs4all.nl>
L:	linux-media@vger.kernel.org
@@ -9240,6 +9248,12 @@ F: Documentation/admin-guide/media/ipu3_rcb.svg
F:	Documentation/userspace-api/media/v4l/pixfmt-meta-intel-ipu3.rst
F:	drivers/staging/media/ipu3/
INTEL IXP4XX CRYPTO SUPPORT
M:	Corentin Labbe <clabbe@baylibre.com>
L:	linux-crypto@vger.kernel.org
S:	Maintained
F:	drivers/crypto/ixp4xx_crypto.c
INTEL IXP4XX QMGR, NPE, ETHERNET and HSS SUPPORT
M:	Krzysztof Halasa <khalasa@piap.pl>
S:	Maintained
@@ -15143,6 +15157,13 @@ S: Maintained
F:	Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt
F:	drivers/cpufreq/qcom-cpufreq-nvmem.c
QUALCOMM CRYPTO DRIVERS
M:	Thara Gopinath <thara.gopinath@linaro.org>
L:	linux-crypto@vger.kernel.org
L:	linux-arm-msm@vger.kernel.org
S:	Maintained
F:	drivers/crypto/qce/
QUALCOMM EMAC GIGABIT ETHERNET DRIVER
M:	Timur Tabi <timur@kernel.org>
L:	netdev@vger.kernel.org
+1 −9
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@@ -45,20 +45,12 @@ poly1305-arm-y := poly1305-core.o poly1305-glue.o
nhpoly1305-neon-y := nh-neon-core.o nhpoly1305-neon-glue.o
curve25519-neon-y := curve25519-core.o curve25519-glue.o

ifdef REGENERATE_ARM_CRYPTO
quiet_cmd_perl = PERL    $@
      cmd_perl = $(PERL) $(<) > $(@)

$(src)/poly1305-core.S_shipped: $(src)/poly1305-armv4.pl
$(obj)/%-core.S: $(src)/%-armv4.pl
	$(call cmd,perl)

$(src)/sha256-core.S_shipped: $(src)/sha256-armv4.pl
	$(call cmd,perl)

$(src)/sha512-core.S_shipped: $(src)/sha512-armv4.pl
	$(call cmd,perl)
endif

clean-files += poly1305-core.S sha256-core.S sha512-core.S

# massage the perlasm code a bit so we only get the NEON routine if we need it
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