Commit 607475cf authored by Binbin Wu's avatar Binbin Wu Committed by Sean Christopherson
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KVM: x86: Add helpers to query individual CR0/CR4 bits 



Add helpers to check if a specific CR0/CR4 bit is set to avoid a plethora
of implicit casts from the "unsigned long" return of kvm_read_cr*_bits(),
and to make each caller's intent more obvious.

Defer converting helpers that do truly ugly casts from "unsigned long" to
"int", e.g. is_pse(), to a future commit so that their conversion is more
isolated.

Opportunistically drop the superfluous pcid_enabled from kvm_set_cr3();
the local variable is used only once, immediately after its declaration.

Suggested-by: default avatarSean Christopherson <seanjc@google.com>
Signed-off-by: default avatarBinbin Wu <binbin.wu@linux.intel.com>
Link: https://lore.kernel.org/r/20230322045824.22970-2-binbin.wu@linux.intel.com


[sean: move "obvious" conversions to this commit, massage changelog]
Signed-off-by: default avatarSean Christopherson <seanjc@google.com>
parent 0c928ff2

arch/x86/kvm/cpuid.c

+2 −2
Original line number Diff line number Diff line
@@ -266,7 +266,7 @@ static void __kvm_update_cpuid_runtime(struct kvm_vcpu *vcpu, struct kvm_cpuid_e 
		/* Update OSXSAVE bit */

		if (boot_cpu_has(X86_FEATURE_XSAVE))

			cpuid_entry_change(best, X86_FEATURE_OSXSAVE,

				   kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE));

					   kvm_is_cr4_bit_set(vcpu, X86_CR4_OSXSAVE));



		cpuid_entry_change(best, X86_FEATURE_APIC,

			   vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE);
@@ -275,7 +275,7 @@ static void __kvm_update_cpuid_runtime(struct kvm_vcpu *vcpu, struct kvm_cpuid_e 
	best = cpuid_entry2_find(entries, nent, 7, 0);

	if (best && boot_cpu_has(X86_FEATURE_PKU) && best->function == 0x7)

		cpuid_entry_change(best, X86_FEATURE_OSPKE,

				   kvm_read_cr4_bits(vcpu, X86_CR4_PKE));

				   kvm_is_cr4_bit_set(vcpu, X86_CR4_PKE));



	best = cpuid_entry2_find(entries, nent, 0xD, 0);

	if (best)

arch/x86/kvm/kvm_cache_regs.h

+16 −0
Original line number Diff line number Diff line
@@ -157,6 +157,14 @@ static inline ulong kvm_read_cr0_bits(struct kvm_vcpu *vcpu, ulong mask) 
	return vcpu->arch.cr0 & mask;

}



static __always_inline bool kvm_is_cr0_bit_set(struct kvm_vcpu *vcpu,

					       unsigned long cr0_bit)

{

	BUILD_BUG_ON(!is_power_of_2(cr0_bit));



	return !!kvm_read_cr0_bits(vcpu, cr0_bit);

}



static inline ulong kvm_read_cr0(struct kvm_vcpu *vcpu)

{

	return kvm_read_cr0_bits(vcpu, ~0UL);
@@ -171,6 +179,14 @@ static inline ulong kvm_read_cr4_bits(struct kvm_vcpu *vcpu, ulong mask) 
	return vcpu->arch.cr4 & mask;

}



static __always_inline bool kvm_is_cr4_bit_set(struct kvm_vcpu *vcpu,

					       unsigned long cr4_bit)

{

	BUILD_BUG_ON(!is_power_of_2(cr4_bit));



	return !!kvm_read_cr4_bits(vcpu, cr4_bit);

}



static inline ulong kvm_read_cr3(struct kvm_vcpu *vcpu)

{

	if (!kvm_register_is_available(vcpu, VCPU_EXREG_CR3))

arch/x86/kvm/mmu.h

+1 −1
Original line number Diff line number Diff line
@@ -132,7 +132,7 @@ static inline unsigned long kvm_get_pcid(struct kvm_vcpu *vcpu, gpa_t cr3) 
{

	BUILD_BUG_ON((X86_CR3_PCID_MASK & PAGE_MASK) != 0);



	return kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE)

	return kvm_is_cr4_bit_set(vcpu, X86_CR4_PCIDE)

	       ? cr3 & X86_CR3_PCID_MASK

	       : 0;

}

arch/x86/kvm/pmu.c

+2 −2
Original line number Diff line number Diff line
@@ -540,9 +540,9 @@ int kvm_pmu_rdpmc(struct kvm_vcpu *vcpu, unsigned idx, u64 *data) 
	if (!pmc)

		return 1;



	if (!(kvm_read_cr4_bits(vcpu, X86_CR4_PCE)) &&

	if (!kvm_is_cr4_bit_set(vcpu, X86_CR4_PCE) &&

	    (static_call(kvm_x86_get_cpl)(vcpu) != 0) &&

	    (kvm_read_cr0_bits(vcpu, X86_CR0_PE)))

	    kvm_is_cr0_bit_set(vcpu, X86_CR0_PE))

		return 1;



	*data = pmc_read_counter(pmc) & mask;

arch/x86/kvm/vmx/nested.c

+1 −1
Original line number Diff line number Diff line
@@ -5154,7 +5154,7 @@ static int handle_vmxon(struct kvm_vcpu *vcpu) 
	 * does force CR0.PE=1, but only to also force VM86 in order to emulate

	 * Real Mode, and so there's no need to check CR0.PE manually.

	 */

	if (!kvm_read_cr4_bits(vcpu, X86_CR4_VMXE)) {

	if (!kvm_is_cr4_bit_set(vcpu, X86_CR4_VMXE)) {

		kvm_queue_exception(vcpu, UD_VECTOR);

		return 1;

	}