Commit 60600397 authored by Marijn Suijten's avatar Marijn Suijten Committed by Stephen Boyd
Browse files

dt-bindings: clocks: qcom,gcc-msm8998: Reflect actually referenced clks 



Some of these clocks are not referenced by the driver at all whereas
aud_ref_clk and core_bi_pll_test_se are but were missing from the
bindings.  These clocks are optional (and not currently provided
anywhere) while "xo" and "sleep_clk" are mandatory.

Note that none of these clocks were used beforehand as the driver
referenced them by their global name.

Signed-off-by: default avatarMarijn Suijten <marijn.suijten@somainline.org>
Link: https://lore.kernel.org/r/20210911121340.261920-7-marijn.suijten@somainline.org


Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent 9ee049eb

Documentation/devicetree/bindings/clock/qcom,gcc-msm8998.yaml

+8 −18
Original line number Diff line number Diff line
@@ -25,21 +25,17 @@ properties: 
    items:

      - description: Board XO source

      - description: Sleep clock source

      - description: USB 3.0 phy pipe clock

      - description: UFS phy rx symbol clock for pipe 0

      - description: UFS phy rx symbol clock for pipe 1

      - description: UFS phy tx symbol clock

      - description: PCIE phy pipe clock

      - description: Audio reference clock (Optional clock)

      - description: PLL test clock source (Optional clock)

    minItems: 2



  clock-names:

    items:

      - const: xo

      - const: sleep_clk

      - const: usb3_pipe

      - const: ufs_rx_symbol0

      - const: ufs_rx_symbol1

      - const: ufs_tx_symbol0

      - const: pcie0_pipe

      - const: aud_ref_clk # Optional clock

      - const: core_bi_pll_test_se # Optional clock

    minItems: 2



  '#clock-cells':

    const: 1
@@ -80,16 +76,10 @@ examples: 
      clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,

               <&sleep>,

               <0>,

               <0>,

               <0>,

               <0>,

               <0>;

      clock-names = "xo",

                    "sleep_clk",

                    "usb3_pipe",

                    "ufs_rx_symbol0",

                    "ufs_rx_symbol1",

                    "ufs_tx_symbol0",

                    "pcie0_pipe";

                    "aud_ref_clk",

                    "core_bi_pll_test_se";

    };

...