Commit 6007878a authored Nov 04, 2022 by Juergen Gross Committed by Borislav Petkov Nov 22, 2022

x86/cpu: Switch to cpu_feature_enabled() for X86_FEATURE_XENPV



Convert the remaining cases of static_cpu_has(X86_FEATURE_XENPV) and
boot_cpu_has(X86_FEATURE_XENPV) to use cpu_feature_enabled(), allowing
more efficient code in case the kernel is configured without
CONFIG_XEN_PV.

Signed-off-by: Juergen Gross <jgross@suse.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Acked-by: Dave Hansen <dave.hansen@linux.intel.com>
Link: https://lore.kernel.org/r/20221104072701.20283-6-jgross@suse.com

parent d76c4f7a

arch/x86/kernel/cpu/amd.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -985,7 +985,7 @@ static void init_amd(struct cpuinfo_x86 *c)
		set_cpu_cap(c, X86_FEATURE_3DNOWPREFETCH);

		/* AMD CPUs don't reset SS attributes on SYSRET, Xen does. */
		if (!cpu_has(c, X86_FEATURE_XENPV))
		if (!cpu_feature_enabled(X86_FEATURE_XENPV))
		set_cpu_bug(c, X86_BUG_SYSRET_SS_ATTRS);

		/*

arch/x86/kernel/cpu/bugs.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -1302,7 +1302,7 @@ static enum spectre_v2_mitigation_cmd __init spectre_v2_parse_cmdline(void)
		return SPECTRE_V2_CMD_AUTO;
		}

		if (cmd == SPECTRE_V2_CMD_IBRS && boot_cpu_has(X86_FEATURE_XENPV)) {
		if (cmd == SPECTRE_V2_CMD_IBRS && cpu_feature_enabled(X86_FEATURE_XENPV)) {
		pr_err("%s selected but running as XenPV guest. Switching to AUTO select\n",
		mitigation_options[i].option);
		return SPECTRE_V2_CMD_AUTO;

arch/x86/kernel/cpu/hygon.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -339,7 +339,7 @@ static void init_hygon(struct cpuinfo_x86 *c)
		set_cpu_cap(c, X86_FEATURE_ARAT);

		/* Hygon CPUs don't reset SS attributes on SYSRET, Xen does. */
		if (!cpu_has(c, X86_FEATURE_XENPV))
		if (!cpu_feature_enabled(X86_FEATURE_XENPV))
		set_cpu_bug(c, X86_BUG_SYSRET_SS_ATTRS);

		check_null_seg_clears_base(c);

arch/x86/kernel/process_64.c

+2 −2

Original line number	Diff line number	Diff line
		@@ -165,7 +165,7 @@ static noinstr unsigned long __rdgsbase_inactive(void)

		lockdep_assert_irqs_disabled();

		if (!static_cpu_has(X86_FEATURE_XENPV)) {
		if (!cpu_feature_enabled(X86_FEATURE_XENPV)) {
		native_swapgs();
		gsbase = rdgsbase();
		native_swapgs();
		@@ -190,7 +190,7 @@ static noinstr void __wrgsbase_inactive(unsigned long gsbase)
		{
		lockdep_assert_irqs_disabled();

		if (!static_cpu_has(X86_FEATURE_XENPV)) {
		if (!cpu_feature_enabled(X86_FEATURE_XENPV)) {
		native_swapgs();
		wrgsbase(gsbase);
		native_swapgs();

arch/x86/kernel/topology.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -106,7 +106,7 @@ int arch_register_cpu(int num)
		* Xen PV guests don't support CPU0 hotplug at all.
		*/
		if (c->x86_vendor != X86_VENDOR_INTEL \|\|
		boot_cpu_has(X86_FEATURE_XENPV))
		cpu_feature_enabled(X86_FEATURE_XENPV))
		cpu0_hotpluggable = 0;

		/*