Commit 5ffe43c0 authored by Bjorn Helgaas's avatar Bjorn Helgaas
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Merge branch 'pci/controller/tegra194'

- Revert "PCI: tegra194: Enable support for 256 Byte payload" because Linux
  doesn't know how to reduce MPS from to 256 to 128 bytes for Endpoints
  below a Switch (because other devices below the Switch might already be
  operating), which leads to Malformed TLP errors (Vidya Sagar)

* pci/controller/tegra194:
  Revert "PCI: tegra194: Enable support for 256 Byte payload"
parents a7dfca1a ebfde158
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Original line number Diff line number Diff line
@@ -900,11 +900,6 @@ static int tegra_pcie_dw_host_init(struct dw_pcie_rp *pp)
		pcie->pcie_cap_base = dw_pcie_find_capability(&pcie->pci,
							      PCI_CAP_ID_EXP);

	val_16 = dw_pcie_readw_dbi(pci, pcie->pcie_cap_base + PCI_EXP_DEVCTL);
	val_16 &= ~PCI_EXP_DEVCTL_PAYLOAD;
	val_16 |= PCI_EXP_DEVCTL_PAYLOAD_256B;
	dw_pcie_writew_dbi(pci, pcie->pcie_cap_base + PCI_EXP_DEVCTL, val_16);

	val = dw_pcie_readl_dbi(pci, PCI_IO_BASE);
	val &= ~(IO_BASE_IO_DECODE | IO_BASE_IO_DECODE_BIT8);
	dw_pcie_writel_dbi(pci, PCI_IO_BASE, val);
@@ -1887,11 +1882,6 @@ static void pex_ep_event_pex_rst_deassert(struct tegra_pcie_dw *pcie)
	pcie->pcie_cap_base = dw_pcie_find_capability(&pcie->pci,
						      PCI_CAP_ID_EXP);

	val_16 = dw_pcie_readw_dbi(pci, pcie->pcie_cap_base + PCI_EXP_DEVCTL);
	val_16 &= ~PCI_EXP_DEVCTL_PAYLOAD;
	val_16 |= PCI_EXP_DEVCTL_PAYLOAD_256B;
	dw_pcie_writew_dbi(pci, pcie->pcie_cap_base + PCI_EXP_DEVCTL, val_16);

	/* Clear Slot Clock Configuration bit if SRNS configuration */
	if (pcie->enable_srns) {
		val_16 = dw_pcie_readw_dbi(pci, pcie->pcie_cap_base +