Commit 5f3b38da authored by Yicong Yang's avatar Yicong Yang Committed by shiyongbang
Browse files

hwtracing: hisi_ptt: Disable interrupt after trace end 

maillist inclusion
category: bugfix
bugzilla: https://gitee.com/openeuler/kernel/issues/I892TR
CVE: NA

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=4669551e797a2685c44a4151996d9c992e44a3f4



----------------------------------------------------------------------

On trace end we disable the hardware but leave the interrupt
unmasked. Mask the interrupt to make the process reverse to
the start. No actual issue since hardware should send no
interrupt after disabled.

Signed-off-by: default avatarYicong Yang <yangyicong@hisilicon.com>
Acked-by: default avatarJonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: default avatarSuzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20231010084731.30450-2-yangyicong@huawei.com


Signed-off-by: default avatarshiyongbang <shiyongbang@huawei.com>
parent 9358e1f4

drivers/hwtracing/ptt/hisi_ptt.c

+4 −0
Original line number Original line Diff line number Diff line
@@ -183,6 +183,10 @@ static void hisi_ptt_wait_dma_reset_done(struct hisi_ptt *hisi_ptt) 
static void hisi_ptt_trace_end(struct hisi_ptt *hisi_ptt)

static void hisi_ptt_trace_end(struct hisi_ptt *hisi_ptt)

{

{

	writel(0, hisi_ptt->iobase + HISI_PTT_TRACE_CTRL);

	writel(0, hisi_ptt->iobase + HISI_PTT_TRACE_CTRL);



	/* Mask the interrupt on the end */

	writel(HISI_PTT_TRACE_INT_MASK_ALL, hisi_ptt->iobase + HISI_PTT_TRACE_INT_MASK);



	hisi_ptt->trace_ctrl.started = false;

	hisi_ptt->trace_ctrl.started = false;

}

}

drivers/hwtracing/ptt/hisi_ptt.h

+1 −0
Original line number Original line Diff line number Diff line
@@ -47,6 +47,7 @@ 
#define HISI_PTT_TRACE_INT_STAT		0x0890

#define HISI_PTT_TRACE_INT_STAT		0x0890

#define   HISI_PTT_TRACE_INT_STAT_MASK	GENMASK(3, 0)

#define   HISI_PTT_TRACE_INT_STAT_MASK	GENMASK(3, 0)

#define HISI_PTT_TRACE_INT_MASK		0x0894

#define HISI_PTT_TRACE_INT_MASK		0x0894

#define   HISI_PTT_TRACE_INT_MASK_ALL	GENMASK(3, 0)

#define HISI_PTT_TUNING_INT_STAT	0x0898

#define HISI_PTT_TUNING_INT_STAT	0x0898

#define   HISI_PTT_TUNING_INT_STAT_MASK	BIT(0)

#define   HISI_PTT_TUNING_INT_STAT_MASK	BIT(0)

#define HISI_PTT_TRACE_WR_STS		0x08a0

#define HISI_PTT_TRACE_WR_STS		0x08a0